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* swrast: update renderbuffer format assertionsbrian2009-11-101-3/+4
* mesa: fix some begin/end render-to-texture logicbrian2009-11-101-21/+38
* mesa: move check_begin/end_texture_render() callsbrian2009-11-101-9/+11
* mesa: new vars: oldDrawFb, oldReadFb in _mesa_BindFramebufferEXT()brian2009-11-101-3/+7
* mesa: rename vars in _mesa_BindFramebufferEXT()brian2009-11-101-22/+21
* mesa: added comment for check_begin_texture_render()brian2009-11-101-0/+5
* Merge remote branch 'origin/mesa_7_6_branch'Eric Anholt2009-11-103-8/+77
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| * i965: Fix VS constant buffer value loading.Eric Anholt2009-11-101-1/+11
| * i965: Unalias src/dst registers for SGE and friends.Eric Anholt2009-11-101-19/+21
| * i965: Allow use of PROGRAM_LOCAL constants in ARB_vp.Eric Anholt2009-11-101-1/+1
| * r600: don't emit htile regsAlex Deucher2009-11-091-4/+2
| * prog parse: Handle GL_VERTEX_PROGRAM_ARB in glLoadProgramNVIan Romanick2009-11-071-1/+13
| * prog parse: Handle GL_VERTEX_PROGRAM_NV in glProgramStringARBIan Romanick2009-11-071-1/+23
| * prog parse: Handle GL_FRAGMENT_PROGRAM_ARB in glLoadProgramNVIan Romanick2009-11-071-0/+15
| * prog parse: Handle GL_FRAGMENT_PROGRAM_NV in glProgramStringARBIan Romanick2009-11-071-5/+15
* | i965: avoid memsetting all the BRW_WM_MAX_INSN arrays for every compile.Eric Anholt2009-11-104-4/+23
* | i965: Add a note explaining the data cache domain.Eric Anholt2009-11-101-1/+4
* | i965: Unalias src/dst registers for SGE and friends.Eric Anholt2009-11-101-19/+21
* | i965: Allow use of PROGRAM_LOCAL constants in ARB_vp.Eric Anholt2009-11-101-1/+1
* | slang: Fix return value check.Michal Krol2009-11-101-1/+1
* | slang: Check OOM conditions for alloc_node_storage().Michal Krol2009-11-101-4/+15
* | slang: Check return value from new_instruction().Michal Krol2009-11-101-1/+3
* | slang: Fix signed/unsigned int handling in _slang_free_temp().Michal Krol2009-11-101-2/+2
* | slang: Handle OOM condition in new_instruction().Michal Krol2009-11-101-20/+81
* | r600/r700: typo, fix mask of DB_ALPHA_TO_MASKJerome Glisse2009-11-091-3/+3
* | r600: rework DB render setupAlex Deucher2009-11-094-42/+73
* | r600: don't emit htile regsAlex Deucher2009-11-091-4/+2
* | r600: add missing ZPASS setup bits for r7xx+Alex Deucher2009-11-092-0/+6
* | mesa: move code after declbrian2009-11-071-1/+2
* | i965: Use Compr4 instruction compression mode on G4X and newer.Eric Anholt2009-11-063-17/+29
* | i965: Share min/max between brw_wm_emit.c and brw_wm_glsl.cEric Anholt2009-11-063-60/+72
* | i965: Share emit_fb_write() between brw_wm_emit.c and brw_wm_glsl.cEric Anholt2009-11-064-127/+40
* | i965: Share most of the WM functions between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-063-297/+109
* | i965: Share math functions between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt2009-11-063-221/+111
* | i965: Share the sop opcodes between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt2009-11-063-74/+29
* | i965: Share OPCODE_MAD between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-063-30/+13
* | i965: Share the DP3, DP4, and DPH between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-063-99/+33
* | i965: Add generic GLSL code for unaliasing a 3-arg opcode, and share LRP code.Eric Anholt2009-11-063-45/+71
* | i965: Use a normal alu1 emit for OPCODE_TRUNC.Eric Anholt2009-11-062-34/+2
* | i965: Share basic ALU ops between brw_wm_glsl and brw_wm_emit.cEric Anholt2009-11-063-117/+38
* | i965: Collect GLSL src/dst regs up in generic code.Eric Anholt2009-11-062-7/+17
* | mesa: Reduce the source channels considered in optimization passes.Eric Anholt2009-11-061-1/+40
* | mesa: Fix remove_instructions to successfully remove when removeFlags[0].Eric Anholt2009-11-061-0/+6
* | mesa: Add an optimization path to remove use of pointless MOVs.Eric Anholt2009-11-061-1/+83
* | mesa: Fix up the remove_dead_code pass to operate on a channel basis.Eric Anholt2009-11-061-28/+56
* | intel: better front color buffer test in intelClear()Brian Paul2009-11-061-2/+3
* | i965: Always pass the size argument to brw_cache_data.Eric Anholt2009-11-066-57/+21
* | intel: Finish removing the fallback code for bug #16697.Eric Anholt2009-11-061-6/+2
* | intel: Don't validate in a texture image used as a render target.Eric Anholt2009-11-063-11/+15
* | mesa: Attempt to pair up Driver.RenderTexture and FinishRenderTexture()Eric Anholt2009-11-061-0/+4
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