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* i965: Flag BRW_ATOMIC_COUNTER_BUFFER when a possible ABO is respecifiedChris Forbes2014-10-161-0/+2
* mesa: Mark buffer objects that are used as atomic counter buffersChris Forbes2014-10-162-0/+2
* i965/disasm: Add missing message type for Gen7 DP untyped surface readChris Forbes2014-10-161-0/+1
* i965: Correctly use ABO count to trigger flagging of new surfaces.Chris Forbes2014-10-161-1/+1
* i965: No longer reemit textures on BRW_NEW_UNIFORM_BUFFERChris Forbes2014-10-161-2/+1
* i965: Dirty state in BO reallocation based on usage historyChris Forbes2014-10-161-1/+4
* i965: Have mesa flag BRW_NEW_TEXTURE_BUFFER when a TexBO binding changesChris Forbes2014-10-161-0/+1
* i965: Add new dirty flag for new TexBOs.Chris Forbes2014-10-163-0/+4
* mesa: Mark buffer objects that are used as TexBOsChris Forbes2014-10-162-0/+9
* mesa: Mark buffer objects which are bound as UBOsChris Forbes2014-10-161-0/+6
* mesa: Add usage history bitfield to buffer objectsChris Forbes2014-10-161-0/+9
* i965/fs: don't make a fake ir_texture in the Mesa IR frontendConnor Abbott2014-10-151-14/+5
* i965/fs: Refactor the texture emission logic into a single function.Kenneth Graunke2014-10-153-104/+144
* i965/fs: Make gather_channel() not use ir_texture.Connor Abbott2014-10-152-5/+4
* i965/fs: Make swizzle_result() not use ir_texture.Connor Abbott2014-10-153-8/+9
* i965/fs: fix integer textures with swizzlesConnor Abbott2014-10-151-0/+1
* i965/fs: don't pass in ir_texture to emit_texture_*Connor Abbott2014-10-153-24/+23
* i965/fs: don't use ir->type in emit_texture_gen4()Connor Abbott2014-10-151-4/+1
* i965/fs: Don't use ir->lod_info.grad.dPd<x,y> in emit_texture_*.Connor Abbott2014-10-153-18/+31
* i965/fs: Don't use ir->coordinate in emit_texture_*.Connor Abbott2014-10-153-31/+39
* i965/fs: make rescale_texcoord() not use ir_texture.Connor Abbott2014-10-153-8/+8
* i965/fs: Make emit_mcs_fetch() not use ir_texture.Connor Abbott2014-10-152-4/+4
* i965/fs: Rename "length" to "components" in emit_mcs_fetch().Kenneth Graunke2014-10-151-6/+6
* i965: Make brw_texture_offset() not use ir_texture.Connor Abbott2014-10-154-12/+15
* i965/fs: don't use ir->offset in emit_texture_gen5.Connor Abbott2014-10-153-5/+8
* i965/fs: Move texel offset handling to visit(ir_texture *).Kenneth Graunke2014-10-153-11/+29
* i965: Drop ir->op != ir_txf condition in offset checking.Kenneth Graunke2014-10-152-4/+3
* i965: Restore a lost comment about TXF offset bugs.Kenneth Graunke2014-10-151-0/+5
* i965: Allow CSE on Gen4-5 unary math.Kenneth Graunke2014-10-151-1/+1
* i965/fs: Use the correct regs_written on unspill instructionsJason Ekstrand2014-10-141-0/+1
* nouveau: 3d textures are unsupported, limit 3d levels to 1Ilia Mirkin2014-10-141-0/+3
* i965: Use unsynchronized maps for the program cache on LLC platforms.Kenneth Graunke2014-10-131-7/+28
* i965: Issue performance warnings when copying the program cache BO.Kenneth Graunke2014-10-131-0/+3
* i965: Issue performance warnings on MapBufferRange stalls.Kenneth Graunke2014-10-131-3/+4
* mesa: fix error reported on gTexSubImage2D when level not validTapani Pälli2014-10-101-1/+1
* i965: Fix register write checks.Kenneth Graunke2014-10-101-0/+2
* i965: Skip uploading border color when unnecessary.Kenneth Graunke2014-10-091-2/+20
* i965: Use BDW_MOCS_PTE for renderbuffers.Kenneth Graunke2014-10-091-1/+1
* i965: Add a BRW_MOCS_PTE #define.Kenneth Graunke2014-10-091-3/+7
* mesa: Make _mesa_print_arrays use stderr.Kenneth Graunke2014-10-091-3/+3
* i965/compaction: Disable compaction on SNB temporarily.Matt Turner2014-10-031-0/+6
* Revert "i965: Emit ELSE/ENDIF JIP with type D on Gen 7."Matt Turner2014-10-031-2/+2
* i965/fs: Remove dead generate_rep_fb_write prototype.Matt Turner2014-10-031-1/+0
* mesa: fix spurious wglGetProcAddress / GL_INVALID_OPERATION errorBrian Paul2014-10-031-1/+35
* mesa: fix GetTexImage for 1D array depth texturesDave Airlie2014-10-031-2/+7
* st/mesa: Fix paths used in Android buildsTomasz Figa2014-10-033-0/+6
* st/mesa: Generate format_info.c in Android buildsTomasz Figa2014-10-031-0/+9
* util: Include in Android buildsTomasz Figa2014-10-034-2/+5
* i965/fs: Use the correct base_mrf for spilling pairs in SIMD8Jason Ekstrand2014-10-021-3/+4
* i965/fs: Add a MAX_GRF_SIZE define and use it various placesJason Ekstrand2014-10-024-6/+9
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