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* NV fp lexer: Add UP4B and UP4UB instructions that were previously missingIan Romanick2009-09-242-667/+686
* Merge branch 'master' into asm-shader-rework-2Ian Romanick2009-09-10173-8888/+13396
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| * Merge branch 'mesa_7_6_branch'Brian Paul2009-09-106-52/+108
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| | * intel: disable intel_stencil_drawpixels() for nowBrian Paul2009-09-101-0/+16
| | * Fix merge failIan Romanick2009-09-101-13/+0
| | * mesa: need to set all stencil bits to 0 before setting the 1 bitsBrian Paul2009-09-101-0/+9
| | * Merge branch 'mesa_7_5_branch' into mesa_7_6_branchIan Romanick2009-09-102-1/+6
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| | | * intel: add B43 chipset supportZhenyu Wang2009-09-102-1/+6
| | * | i965: Fix relocation delta for WM surfaces.Eric Anholt2009-09-101-1/+1
| | * | mesa: in texenvprogram code, only do saturation when really needed.Brian Paul2009-09-101-8/+53
| | * | radeon: Change debugging code to use macros instead of inline functions.Pauli Nieminen2009-09-102-43/+27
| | * | radeon: Add more verbose error message for failed command buffer.Pauli Nieminen2009-09-091-1/+3
| * | | intel: Don't forget to map the depth read buffer in spans.Eric Anholt2009-09-101-22/+28
| * | | r300: enable rb3d_discard_src_pixel_lte_threshold for more chips on dri2Alex Deucher2009-09-101-5/+1
| * | | r300: add full support for two sided stencil on r5xx for dri2Alex Deucher2009-09-104-4/+46
| * | | mesa: fix cut&paste typosMathias Frohlich2009-09-101-4/+4
| * | | i965: Fix relocation delta for WM surfaces.Eric Anholt2009-09-091-1/+1
| * | | i965: fix an overlooked merge conflictBrian Paul2009-09-091-13/+0
| * | | r600: check if textures are actually enabled before submissionAlex Deucher2009-09-092-56/+64
| * | | Merge branch 'mesa_7_6_branch'Brian Paul2009-09-096-2/+28
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| | * | Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul2009-09-095-1/+24
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| | | * mesa: bump version to 7.5.2Brian Paul2009-09-081-3/+3
| | | * i965: fix incorrect test for vertex position attributeBrian Paul2009-09-083-1/+4
| | | * i965: Fix warnings in intel_pixel_read.c.Eric Anholt2009-09-041-0/+4
| | | * intel: Also get the DRI2 front buffer when doing front buffer reading.Eric Anholt2009-09-044-1/+29
| | | * intel: Update Mesa state before span setup in glReadPixels.Eric Anholt2009-09-043-3/+13
| | | * intel: Move intel_pixel_read.c to shared for use with i965.Eric Anholt2009-09-042-306/+307
| | | * i965: Add missing state dependency of sf_unit on _NEW_BUFFERS.Eric Anholt2009-09-041-2/+4
| | | * intel: Align cubemap texture height to its padding requirements.Eric Anholt2009-09-041-0/+10
| | | * intel: Align untiled region height to 2 according to 965 docs.Eric Anholt2009-09-041-0/+7
| | | * i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt2009-09-043-1/+5
| | | * i965: Respect CondSwizzle in OPCODE_IF.Eric Anholt2009-09-041-1/+21
| | | * i965: asst clean-ups, etc in brw_vs_emit()Brian Paul2009-09-041-11/+10
| | | * i965: Emit conditional code updates as required for GLSL VS if statements.Eric Anholt2009-09-041-0/+13
| | | * i965: Spell "conditional" correctly.Eric Anholt2009-09-043-15/+15
| | | * i965: Fix RECT shadow sampling by not losing the other texcoords.Eric Anholt2009-09-041-1/+5
| | | * i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt2009-09-041-0/+14
| | | * i965: Even if no VS inputs are set, still load some amount of URB as required.Eric Anholt2009-09-041-0/+11
| | | * i965: Make sure the VS URB size is big enough to fit a VF VUE.Eric Anholt2009-09-041-1/+8
| | | * i965: Don't emit bad packets when no VBs are referenced.Eric Anholt2009-09-041-0/+22
| | | * i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt2009-09-042-29/+18
| | | * i965: Set the max index buffer address correctly according to the docs.Eric Anholt2009-09-041-1/+1
| | | * i965: rename var: s/tmp/vs_inputs/Brian Paul2009-09-041-8/+8
| | | * st/mesa: silence uninitialized var warningsBrian Paul2009-09-031-2/+2
| | | * st/mesa: fix glCopyPixels(GL_STENCIL_INDEX) inverted positionBrian Paul2009-09-031-0/+4
| | | * st/mesa: Do GL_RGBA->GL_RGB texsubimage on hardwareKeith Whitwell2009-09-021-14/+51
| | | * swrast: fix selection/feedback regressionBrian Paul2009-08-311-1/+1
| | | * swrast: can't use deferred texture/shading if using KIL instructionBrian Paul2009-08-311-0/+3
| | | * mesa: added const qualifiers, move local varBrian Paul2009-08-311-7/+8
| | | * mesa: fix saturation logic in emit_texenv()Brian Paul2009-08-311-1/+7