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* i965: Tell backend register about double precision typeTopi Pohjolainen2016-05-101-1/+2
* i965: Determine size of double precision float registerTopi Pohjolainen2016-05-101-0/+1
* i965: Lower DFRACEXP/DLDEXPTopi Pohjolainen2016-05-101-0/+1
* i965: use pack/unpackDouble loweringConnor Abbott2016-05-101-0/+1
* i965: use double lowering passConnor Abbott2016-05-102-0/+10
* i965: enable lrp lowering for doublesSamuel Iglesias Gonsálvez2016-05-101-0/+1
* st/glsl_to_tgsi: brown paper bag for the input offsets fix.Dave Airlie2016-05-101-1/+1
* mesa/vbo: fix check for zero aliases with 2/10/10/10Dave Airlie2016-05-101-1/+1
* st/glsl_to_tgsi: handle offsets from inputsDave Airlie2016-05-101-0/+9
* Revert "Revert "i965: Switch to scalar TCS by default.""Kenneth Graunke2016-05-091-1/+1
* i965: Actually assign binding table offsets for the TCS.Kenneth Graunke2016-05-091-0/+5
* i965: Clamp "Maximum VP Index" to 1 when gl_ViewportIndex isn't written.Kenneth Graunke2016-05-091-3/+10
* i965/hsw: Fix brw_store_data_imm*Jordan Justen2016-05-091-10/+12
* i965: Reimplement ARB_transform_feedback2 on Haswell and later.Kenneth Graunke2016-05-095-12/+318
* i965: Add a brw_load_register_reg64 helper.Kenneth Graunke2016-05-092-0/+20
* i965: Only enable ARB_query_buffer_object for newer kernels on Haswell.Kenneth Graunke2016-05-093-1/+15
* mesa/objectlabel: don't return info on genned but never bound textures.Dave Airlie2016-05-101-1/+1
* mesa: don't use genned but unnamed xfb objects.Dave Airlie2016-05-102-1/+14
* mesa/compute: Fix indirect dispatch buffer size check on 32-bit systemsJordan Justen2016-05-091-1/+1
* Revert "i965: Always use Y-tiled buffers on SKL+"Daniel Stone2016-05-094-30/+8
* mesa/shader_query: add missing subroutines casesDave Airlie2016-05-091-0/+13
* gallium: fix various undefined left shifts into sign bitNicolai Hähnle2016-05-072-3/+3
* mesa/main: fix another undefined left shiftNicolai Hähnle2016-05-071-1/+1
* mesa/main: define _NEW_xxx flags as unsigned shiftsNicolai Hähnle2016-05-071-30/+30
* Revert "i965: Switch to scalar TCS by default."Kenneth Graunke2016-05-051-1/+1
* i965/fs: Move handling of samples_identical into the switch statementJason Ekstrand2016-05-051-21/+19
* i965/fs: Simplify texture destination fixupsJason Ekstrand2016-05-051-21/+11
* i965/fs: stop inclinding glsl/ir.h in brw_fs.hJason Ekstrand2016-05-052-1/+1
* i965/fs: Merge nir_emit_texture and emit_textureJason Ekstrand2016-05-053-238/+162
* i965: Switch to scalar TCS by default.Kenneth Graunke2016-05-051-1/+1
* i965: Rework passthrough TCS checks.Kenneth Graunke2016-05-054-2/+5
* i965/fs: Don't follow pow with an instruction with two dest regs.Matt Turner2016-05-051-0/+18
* mesa/ubo: add missing compute cases for ubo/atomic buffersDave Airlie2016-05-051-0/+6
* mesa/compute: drop pointless casts.Dave Airlie2016-05-051-3/+3
* mesa: remove null check before freeThomas Hindoe Paaboel Andersen2016-05-052-4/+2
* mesa: include texture format in glGenerateMipmap error messageBrian Paul2016-05-041-1/+2
* main: uses casts to silence some _mesa_debug() format warningsBrian Paul2016-05-041-4/+6
* i965: Implement ARB_query_buffer_object for HSW+Jordan Justen2016-05-048-3/+501
* i965/gen6+: Add load register immediate helper functionsJordan Justen2016-05-042-0/+36
* i965/hsw+: Add support for copying a registerJordan Justen2016-05-043-0/+18
* i965/gen6+: Add support for storing immediate data into a bufferJordan Justen2016-05-043-0/+50
* i965: Add MI_MATH reg defs for HSW+Jordan Justen2016-05-041-0/+38
* i965: Add brw_store_register_mem32Jordan Justen2016-05-042-0/+28
* i965: Use offset instead of index in brw_store_register_mem64Jordan Justen2016-05-045-54/+52
* i965: Delete stale perf_debug().Kenneth Graunke2016-05-041-2/+0
* i965: Silence unused variable warningKenneth Graunke2016-05-041-2/+0
* mesa/main: handle double uniform matrices properlyJuan A. Suarez Romero2016-05-041-1/+1
* nir: Separate 32 and 64-bit fmod loweringSamuel Iglesias Gonsálvez2016-05-041-1/+1
* i965: Define GEN_GE/GEN_LE macros in terms of GEN_LT.Matt Turner2016-05-031-2/+3
* i965: Add disassembler support for remaining opcodes.Matt Turner2016-05-032-18/+92
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