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* i965/fs: We only support 32-bit integer ALU operations for nowIago Toral Quiroga2016-05-101-3/+29
* i965/fs: handle fp64 opcodes in brw_do_channel_expressionsIago Toral Quiroga2016-05-101-9/+14
* i965/fs: add support for f2d and d2fConnor Abbott2016-05-101-0/+2
* i965/fs: add a pass for legalizing d2fConnor Abbott2016-05-104-0/+81
* i965/fs: fix dst width calculation in CSEConnor Abbott2016-05-101-1/+2
* i965/fs: fix regs_written in LOAD_PAYLOAD for doublesConnor Abbott2016-05-101-2/+6
* i965/fs: fix is_copy_payload() for doublesConnor Abbott2016-05-101-1/+1
* i965/fs: fix compares for doublesConnor Abbott2016-05-101-3/+31
* i965/fs: extend exec_size halving in the generatorConnor Abbott2016-05-101-6/+10
* i965/fs: fix assign_constant_locations() for doublesConnor Abbott2016-05-101-2/+6
* i965/fs: use byte_offset() in offset() for uniformsConnor Abbott2016-05-101-3/+1
* i965/fs: handle uniforms in byte_offset()Connor Abbott2016-05-101-1/+5
* i965/fs: fix type_size() for doublesConnor Abbott2016-05-101-1/+2
* i965/fs: optimize unpack doubleIago Toral Quiroga2016-05-101-4/+26
* i965/fs: optimize pack doubleIago Toral Quiroga2016-05-101-0/+29
* i965/fs/nir: translate double pack/unpackConnor Abbott2016-05-101-0/+12
* i965/fs: add a pass for lowering PACK opcodesConnor Abbott2016-05-104-0/+62
* i965/fs: add PACK opcodeConnor Abbott2016-05-105-1/+15
* i965/fs: Introduce helper to extract a field from each channel of a register.Francisco Jerez2016-05-101-0/+28
* i965/fs: always pass the bitsize to brw_type_for_nir_type()Connor Abbott2016-05-101-3/+9
* i965/fs: add support for printing double immediatesConnor Abbott2016-05-101-0/+3
* i965/fs: don't propagate 64-bit immediatesConnor Abbott2016-05-101-0/+2
* i965/fs: use the NIR bit size when creating registersConnor Abbott2016-05-101-8/+28
* i965: fixup uniform setup for doublesConnor Abbott2016-05-101-1/+6
* i965: two-argument instructions can only use 32-bit immediatesIago Toral Quiroga2016-05-101-0/+2
* i965: fix brw_abs_immediate() for doublesIago Toral Quiroga2016-05-101-2/+4
* i965: fix brw_saturate_immediate() for doublesIago Toral Quiroga2016-05-101-6/+27
* i965: fix is_zero(), is_one() and is_negative_one() for doublesConnor Abbott2016-05-101-4/+24
* i965: fix brw_negate_immediate() for doublesConnor Abbott2016-05-101-2/+4
* i965/eu: add support for DF immediatesConnor Abbott2016-05-101-7/+21
* i965: add support for disassembling DF immediatesConnor Abbott2016-05-101-1/+1
* i965: add support for getting/setting DF immediatesConnor Abbott2016-05-101-0/+25
* i965: add brw_imm_dfConnor Abbott2016-05-102-0/+10
* i965/eu: Allow 3-src float ops with doublesTopi Pohjolainen2016-05-101-6/+18
* i965/disasm: fix disasm of 3-src doublesConnor Abbott2016-05-101-0/+1
* i965: Tell backend register about double precision typeTopi Pohjolainen2016-05-101-1/+2
* i965: Determine size of double precision float registerTopi Pohjolainen2016-05-101-0/+1
* i965: Lower DFRACEXP/DLDEXPTopi Pohjolainen2016-05-101-0/+1
* i965: use pack/unpackDouble loweringConnor Abbott2016-05-101-0/+1
* i965: use double lowering passConnor Abbott2016-05-102-0/+10
* i965: enable lrp lowering for doublesSamuel Iglesias Gonsálvez2016-05-101-0/+1
* st/glsl_to_tgsi: brown paper bag for the input offsets fix.Dave Airlie2016-05-101-1/+1
* mesa/vbo: fix check for zero aliases with 2/10/10/10Dave Airlie2016-05-101-1/+1
* st/glsl_to_tgsi: handle offsets from inputsDave Airlie2016-05-101-0/+9
* Revert "Revert "i965: Switch to scalar TCS by default.""Kenneth Graunke2016-05-091-1/+1
* i965: Actually assign binding table offsets for the TCS.Kenneth Graunke2016-05-091-0/+5
* i965: Clamp "Maximum VP Index" to 1 when gl_ViewportIndex isn't written.Kenneth Graunke2016-05-091-3/+10
* i965/hsw: Fix brw_store_data_imm*Jordan Justen2016-05-091-10/+12
* i965: Reimplement ARB_transform_feedback2 on Haswell and later.Kenneth Graunke2016-05-095-12/+318
* i965: Add a brw_load_register_reg64 helper.Kenneth Graunke2016-05-092-0/+20
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