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* i965: Convert GS_STATE to genxml.Rafael Antognolli2017-07-135-172/+54
| | | | | | | | Merge the code with gen6+ 3DSTATE_GS, and delete brw_gs_state.c, together with brw_gs_unit_state. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Prepare gs_state emitting code to include gen4-5.Rafael Antognolli2017-07-131-13/+11
| | | | | | | | | | | | Since we always call brw_batch_emit anyways, we can hopefully make things simpler by calling it only once, and then branching inside its body. This can be helpful when bringing the gen4-5 code into this function. Additionally, check for GEN_GEN == 6 instead of < 7 in cases that won't apply to lower gens. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Remove upload_gs_state_for_tf.Rafael Antognolli2017-07-134-60/+16
| | | | | | | | | | | | This function only emits a particular case of 3DSTATE_GS. Instead, we can do that inside genX(upload_gs_state), and later reuse part of that code for emitting gen4-5 state. There's the additional benefit of allowing us to remove gen6_gs_state.c, which was only left because of this function. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Convert BLEND_CONSTANT_COLOR state to genxml.Rafael Antognolli2017-07-133-64/+27
| | | | | | | It's a very simple conversion, and it allows us to delete brw_cc.c. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Convert CC state on gen4-5 to genxml.Rafael Antognolli2017-07-135-284/+68
| | | | | | | | | | | | | Use set_blend_entry_bits and set_depth_stencil_bits to fill most of the color calc struct, and then manually update the rest. v2: - Always check for depth_irb (Ken) - Always set Backface Stencil Ref (Ken) - Always set alpha reference value (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Move color calc code around a bit.Rafael Antognolli2017-07-131-8/+8
| | | | | | | This makes the code more consistent accross generations. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Check for alpha channel just like in gen6+.Rafael Antognolli2017-07-131-1/+4
| | | | | | | | | | | | | | gen6+ uses _mesa_base_format_has_channel() to check for the alpha channel, while gen4-5 use ctx->DrawBuffer->Visual.alphaBits. By using _mesa_base_format_has_channel() here we keep the same behavior accross all gen. While initially both ways of checking the alpha channel seemed correct to me, this change also seems to fix fbo-blending-formats piglit test on gen4. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Make a helper function for blend entry related state.Rafael Antognolli2017-07-131-81/+101
| | | | | | | | | Add a helper function to reuse code that fills blend entry related state, and make genX(upload_blend_state) use it. This function can later be used by gen4-5 color calc state to set the blend related bits. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Make a helper function for depth/stencil related state.Kenneth Graunke2017-07-131-48/+65
| | | | | | | | | | | | Gen4-5 basically glue DEPTH_STENCIL_STATE, COLOR_CALC_STATE, and BLEND_STATE together into a single COLOR_CALC_STATE structure. By making a helper function, we'll be able to reuse it when filling out Gen4-5 COLOR_CALC_STATE without replicating any actual logic. We use generation-defined typedef to handle the polymorphism. Reviewed-by: Rafael Antognolli <[email protected]>
* i965: fix missing NULL return if allocation failsLionel Landwerlin2017-07-131-0/+1
| | | | | | CID: 1250585 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: check pointer before dereferencing itLionel Landwerlin2017-07-131-7/+7
| | | | | | | | Check that irb isn't NULL before accessing irb->Base.Base.NumSamples. CID: 1026046 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: map_gtt: check mapping address before adding offsetLionel Landwerlin2017-07-131-1/+3
| | | | | | | | The NULL check might fail if offset isn't 0. CID: 971379 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/urb: Trigger upload_urb on NEW_BLORPJason Ekstrand2017-07-132-3/+2
| | | | | | | | | | | | | | | It's a bit rare, but blorp can trigger a urb reconfiguration. When that happens, we need to re-upload the URB config. Previoulsy blorp would set BRW_NEW_URB_SIZE, but this is a pretty big hammer as it would cause back-to-black blorp operations to reconfigure both times. Using BRW_NEW_BLORP is a small, more accurate hammer. v2 (idr): Sort BRW_NEW_ tokens to match brw_recalculate_urb_fence and gen6_urb. v3 (idr): Don't whack BRW_NEW_URB_SIZE in blorp. Suggested by Jason. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Return GL_INVALID_ENUM for bogus TEXTURE_SRGB_DECODE_EXT params.Kenneth Graunke2017-07-131-1/+12
| | | | | | | Fixes dEQP-GLES31.functional.debug.negative_coverage.get_error.shader.srgb_decode_samplerparameter{f,fv,i,Iiv,Iuiv,iv}. Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* st/mesa: Handle st_framebuffer_create returning NULLMichel Dänzer2017-07-131-3/+5
| | | | | | | | | | | | | st_framebuffer_create returns NULL if stfbi == NULL or st_framebuffer_add_renderbuffer returns false for the colour buffer. Fixes Xorg crashing on startup using glamor on radeonsi. Fixes: 147d7fb772a7 ("st/mesa: add a winsys buffers list in st_context") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101775 Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965/screen: Drop get_tiled_heightJason Ekstrand2017-07-121-17/+3
| | | | | | | It's no longer used. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/screen: Use ISL for doing image import checksJason Ekstrand2017-07-121-4/+28
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/screen: Use ISL for allocating image BOsJason Ekstrand2017-07-121-22/+29
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Add an isl_device to intel_screenJason Ekstrand2017-07-123-1/+8
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Move CCS allocation into create_for_dri_imageJason Ekstrand2017-07-121-13/+12
| | | | | | | | Any form of CCS on gen9+ only works on Y-tiled images. The only caller of create_for_bo which uses Y-tiled BOs is create_for_dri_image. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Use create_for_dri_image in intel_update_image_bufferJason Ekstrand2017-07-121-9/+14
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Add support for window system images to create_for_dri_imageJason Ekstrand2017-07-124-6/+17
| | | | | | | | | | We want to start using create_for_dri_image for all miptrees created from __DRIimage, including those which come from a window system. In order to allow for fast clears to still work on window system buffers, we need to allow for creating aux surfaces. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Add a colorspace parameter to create_for_dri_imageJason Ekstrand2017-07-124-5/+28
| | | | | | | The __DRI_FORMAT enums are all UNORM but we will frequently want sRGB when creating miptrees for renderbuffers. This lets us specify. Reviewed-by: Chad Versace <[email protected]>
* main/formats: Add a get_linear_format_srgb helperJason Ekstrand2017-07-122-0/+25
| | | | Reviewed-by: Chad Versace <[email protected]>
* main/formats: Autogenerate _mesa_get_srgb_format_linearJason Ekstrand2017-07-122-117/+46
| | | | | | | | | | | | | | | | | | Due to the wonders of autogeneration, this new version covers a few formats that the old version was missing: MESA_FORMAT_SRGB8_ALPHA8_ASTC_3x3x3 MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x3x3 MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4x3 MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4x4 MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x4x4 MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5x4 MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5x5 MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x5x5 MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6x5 MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6x6 Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Allocate mt earlier in update winsysBen Widawsky2017-07-123-18/+37
| | | | | | | | | | | | | Later commits require intel_update_image_buffer() to have control over the miptree creation. However, intel_update_winsys_renderbuffer_miptree() currently creates it based on the given buffer object. This patch moves the creation to the caller side. Signed-off-by: Ben Widawsky <[email protected]> Acked-by: Daniel Stone <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Add a return for updating of winsysBen Widawsky2017-07-123-10/+14
| | | | | | | | | | | | | | | | There is nothing particularly useful to do currently if the update fails, but there is no point carrying on either. As a result, this has a behavior change. v2: Make the return type a bool (Topi) v3: Don't leak the bo if update_winsys_renderbuffer fails. (Jason) Signed-off-by: Ben Widawsky <[email protected]> Acked-by: Daniel Stone <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> (v2) Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Use miptree_create_for_dri_image in image_target_renderbuffer_storageJason Ekstrand2017-07-121-22/+1
| | | | | | | | | This does make a tiny functional change in that we now also test for whether or not the format supports texturing and not just rendering. However, this should have no practical effect as all renderbuffers use texturable formats. Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Set level_x/h in create_for_dri_imageJason Ekstrand2017-07-121-0/+2
| | | | Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Add tile_x/y to total_width/heightJason Ekstrand2017-07-121-2/+2
| | | | | | | | | | | | | | | This is what we do in intel_image_target_renderbuffer_storage and it makes more sense than stomping them. Because the image gets created as a 2D image with one miplevel, they should already be equal to the provided width/height. Adding the tile offset makes some sense depending on how you interpret the fields. The only place these fields are used for in state setup is to set up the image parameters we pass into shaders. There may be issues here if you try to use image_load_store on something pulled in from EGL but that's probably broken already. This just makes it consistently broken. Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Pass the offset into create_for_bo in create_for_dri_imageJason Ekstrand2017-07-121-3/+1
| | | | | Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Move the DRIimage -> miptree code to intel_mipmap_tree.cJason Ekstrand2017-07-123-110/+112
| | | | | | | | | | | This is mostly a direct port. The only bit of refactoring that was done was to make creating a planar miptree be an early return from the non-planar case. Alternatively, we could have three functions: two helpers and a main function to just call the right helper. Making the planar case an early return seemed cleaner. Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* st/mesa: add a winsys buffers list in st_contextCharmaine Lee2017-07-114-10/+81
| | | | | | | | | | | | | | | | | | | | | Commit a5e733c6b52e93de3000647d075f5ca2f55fcb71 fixes the dangling framebuffer object by unreferencing the window system draw/read buffers when context is released. However this can prematurely destroy the resources associated with these window system buffers. The problem is reproducible with Turbine Demo running with VMware driver. In this case, the depth buffer content was lost when the context is rebound to a drawable. To prevent premature destroy of the resources associated with window system buffers, this patch maintains a list of these buffers in the context, making sure the reference counts of these buffers will not reach zero until the associated framebuffer interface objects no longer exist. This also helps to avoid unnecessary destruction and re-construction of the resources associated with the framebuffer. Fixes VMware bug 1909807. Reviewed-by: Brian Paul <[email protected]>
* i965: Drop bogus pthread_mutex_unlock in map_gtt error path.Kenneth Graunke2017-07-121-1/+0
| | | | | | | | | | The locking was supposed to go away in commit 314647c4c206917ec01b7 (i965: Drop global bufmgr lock from brw_bo_map_* functions.), but this lone unlock remains. I'm guessing I messed this up when splitting up Chris's patch. Reviewed-by: Chris Wilson <[email protected]>
* intel: Move the DRM uapi headers to a non-Intel location.Eric Anholt2017-07-122-3/+3
| | | | | | | | | | | | I want to remove vc4's dependency on headers from libdrm as well, but storing multiple copies of drm_fourcc.h in our tree would be silly. v2: Update Android.mk as well, move distcheck drm*.h references to top-level noinst_HEADERS. Reviewed-by: Lionel Landwerlin <[email protected]> (v1) Reviewed-by: Daniel Stone <[email protected]> (v1) Reviewed-by: Rob Herring <[email protected]>
* i965: Use VALGRIND_MAKE_MEM_x in place of MALLOCLIKE/FREELIKEChris Wilson2017-07-111-7/+27
| | | | | | | | | | | | | | | | | | | | | Valgrind doesn't actually implement VALGRIND_FREELIKE_BLOCK as the exact inverse of VALGRIND_MALLOCLIKE_BLOCK. It makes the block inaccessible, but still leaves it defined in its allocation tracker i.e. it will report the mmap as lost despite the call to FREELIKE! Instead of treating the mmap as an allocation, treat it as changing the access bits upon the memory, i.e. that it becomes defined (because of the buffer objects always contain valid content from the user's perspective) upon mmap and inaccessible upon munmap. This makes memcheck happy without leaving it thinking there is a very large leak. Finally for consistency, we treat all the mmap/munmap paths the same even though valgrind can intercept the regular mmap used for GTT. We could move this in the drm_mmap/drm_munmap macros, but that quickly looks ugly given the desire for those to support different OSes, but I didn't try that hard! Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix asynchronous mappings on !LLC platforms.Kenneth Graunke2017-07-111-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | | When using a read-only CPU mapping, we may encounter stale buffer contents. For example, the Piglit primitive-restart test offers the following scenario: 1. Read data via a CPU map. 2. Destroy that buffer. 3. Create a new buffer - obtaining the same one via the BO cache. 4. Call BufferSubData, which does a GTT map with MAP_WRITE | MAP_ASYNC. (We avoid set_domain for async mappings, so no flushing occurs.) 5. Read data via a CPU map. (Without explicit clflushing, this will contain data from step 1!) Otherwise, everything ought to work, keeping in mind that we never use CPU maps for writing - just read-only CPU maps. This restores the performance gains after Matt's revert in commit 71651b3139c501f50e6547c21a1cdb816b0a9dde. v2: Do the invalidate later, and even when asking for a brand new map. v3: Add more comments from Chris. Reviewed-by: Chris Wilson <[email protected]>
* i965: Don't use PREAD for glGetBufferSubData().Kenneth Graunke2017-07-113-28/+10
| | | | | | | | | | | | | | | Just map the buffer and memcpy. This will do a CPU mmap, which should be reasonably efficient, and doing this gives us full control over the domains and caching instead of leaving it to the kernel. This prevents regressions on Braswell in the next commit. Specifically GL45-CTS.shader_atomic_counters.basic-buffer-operations. Because async maps start skipping set-domain, the pread thought everything was nicely still in the CPU domain, and returned stale data. v2: Use _mesa_error_no_memory() if the map fails instead of crashing. Reviewed-by: Chris Wilson <[email protected]>
* i965: perf: use new subslices numbers from device infoLionel Landwerlin2017-07-111-32/+17
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965: Use already existing eu_totalBen Widawsky2017-07-111-8/+1
| | | | | | | | Reduces IOCTL calls by 1, and provides a centralized place to override such configurations if we have a need to do so. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Resolve framebuffers before signaling the fenceChris Wilson2017-07-111-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From KHR_fence_sync: When the condition of the sync object is satisfied by the fence command, the sync is signaled by the associated client API context, causing any eglClientWaitSyncKHR commands (see below) blocking on <sync> to unblock. The only condition currently supported is EGL_SYNC_PRIOR_COMMANDS_COMPLETE_KHR, which is satisfied by completion of the fence command corresponding to the sync object, and all preceding commands in the associated client API context's command stream. The sync object will not be signaled until all effects from these commands on the client API's internal and framebuffer state are fully realized. No other state is affected by execution of the fence command. If clients are passing the fence fd (from EGL_ANDROID_native_fence_sync) to a compositor, that fence must only be signaled once the framebuffer is resolved and not before as is currently the case. v2: fixup assert to use GL_SYNC_GPU_COMMANDS_COMPLETE (Chad) Reported-by: Sergi Granell <[email protected]> Fixes: c636284ee8ee ("i965/sync: Implement DRI2_Fence extension") Signed-off-by: Chris Wilson <[email protected]> Cc: Sergi Granell <[email protected]> Cc: Rob Clark <[email protected]> Cc: Chad Versace <[email protected]> Cc: Daniel Stone <[email protected]> Cc: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Assert that we don't use CPU write maps to non-coherent buffers.cros-mesa-17.1.1-r3-vanillachadv/cros-mesa-17.1.1-r3-vanillaKenneth Graunke2017-07-101-0/+6
| | | | | | | | | Using CPU maps of non-coherent buffers can get us in a lot of trouble, and WC maps are a reasonable alternative anyway. Guard against shooting ourselves in the foot by adding an assert, and comment. Reviewed-by: Chris Wilson <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Disable access to CPU mmap for async access on non-LLC machinesChris Wilson2017-07-101-4/+12
| | | | | | | | | | | | | | | | | If the user triggers an implicit batch flush while holding access to a CPU mapped buffer, that mmapping will be invalidated by the kernel for non-LLC devices. (The kernel when executing a batch will change the cache domain of the buffers in that batch, which for non-LLC CPU access will cause that buffer to be clflushed and any further CPU access to be discarded.) To prevent this, simply disallow any CPU async mmap access. The cases where async CPU access to a non-LLC buffer should continue to be allowed via their preferred snooping path. v2 (Ken): Reword the comment slightly. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Track when a bo is shared with an external clientChris Wilson2017-07-102-0/+9
| | | | | | | | | | | | | If the buffer is being shared with an external client, our own state tracking may be stale and in some cases we may wish to double check with the kernel/hw state. At the moment, this is synonymous with not being reusable, but the semantics between reusable and external are quite different and we will have more examples of non-reusable buffers in the near future. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* gallium: use "ull" number suffix to keep the QtCreator parser happyMarek Olšák2017-07-101-2/+2
| | | | | | | It can't parse "llu". Reviewed-by: Thomas Helland <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* i965: Use brw_bo_wait() for brw_bo_wait_rendering()Chris Wilson2017-07-105-8/+10
| | | | | | | | | | | | | | Currently, we use set_domain() to cause a stall on rendering. But the set-domain ioctl has the side-effect of changing the kernel's cache domain underneath the struct_mutex, which may perturb state if there was no rendering to wait upon and in general is much heavier than the lockless wait-ioctl. Historically libdrm used set-domain as we did not have an explicit wait-ioctl (and the patches to teach it to use wait if available were lost in the mists). Since mesa already depends upon a kernel support the wait-ioctl, we do not need to supply a fallback. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* st/mesa: Fix grabbing the wrong variant if glDrawPixels is calledMatias N. Goldberg2017-07-082-4/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | By design pixel shaders can have up to 3 variants: * The standard one. * glDrawPixels variant. * glBitmap variant. However "shader_has_one_variant" ignores this fact, and therefore st_update_fp would select the wrong variant if glDrawPixels or glBitmap was ever called. This patch fixes the problem. If the standard variant has been created, calling glDrawPixels or glBitmap will append the variant to the second entry of the linked list, so that st_update_fp still selects the right one if shader_has_one_variant is set. If the standard variant hasn't been created yet and glDrawPixel/Bitmap has been called, st_update_fp will will see this and take the slow path instead. The standard variant will then be added at the front of the linked list, so that the next time the fast path is taken. Blender in particular is hit by this bug. v2: Marek - cosmetic changes Fixes https://bugs.freedesktop.org/show_bug.cgi?id=101596 Signed-off-by: Marek Olšák <[email protected]>
* mesa: finish implementing glPrimitiveRestartNV() for display listsBrian Paul2017-07-071-1/+21
| | | | | | | | | | | | | If we try to build a display list with just a glPrimitiveRestartNV() call, we'd crash because of a null GLvertexformat::PrimitiveRestartNV pointer. This change fixes that case. The previous patch fixed the case of calling glPrimitiveRestartNV() inside a glBegin/End pair. v2: minor clean-up in save_PrimitiveRestartNV(), per Charmaine. Reviewed-by: Charmaine Lee <[email protected]>
* vbo: fix glPrimitiveRestartNV crash inside a display listOlivier Lauffenburger2017-07-071-5/+15
| | | | | | | | | | | | | | | | | | | | glPrimitiveRestartNV crashes when it is called during the compilation of a display list. There are two reasons: - ctx->Driver.CurrentSavePrimitive is not set to the current primitive - save_PrimitiveRestartNV() calls _save_Begin() which only sets an OpenGL error, instead of calling vbo_save_NotifyBegin(). This patch correctly calls vbo_save_NotifyBegin() but it detects the current primitive mode by looking at the latest saved primitive. Additional work by Brian Paul Signed-off-by: Olivier Lauffenburger <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101464 Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* st/mesa: remove unused st_framebuffer::Private fieldBrian Paul2017-07-071-1/+0
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>