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* i965/fs: Emit a MOV instead of a SEL if the sources are the same.Matt Turner2013-12-041-19/+23
* i965/fs: Extend SEL peephole to handle only matching MOVs.Matt Turner2013-12-041-3/+2
* i965/fs: New peephole optimization to generate SEL.Matt Turner2013-12-044-0/+225
* i965/fs: Add SEL() convenience function.Matt Turner2013-12-042-0/+2
* i965: Print conditional mod in dump_instruction().Matt Turner2013-12-042-2/+6
* i965: Externalize conditional_modifier for use in dump_instruction().Matt Turner2013-12-042-1/+2
* i965: Print argument types in dump_instruction().Matt Turner2013-12-042-2/+10
* i965: Externalize reg_encoding for use in dump_instruction().Matt Turner2013-12-042-1/+2
* i965/vec4: Don't print swizzles for immediate values.Matt Turner2013-12-041-4/+6
* i965/vec4: Print negate and absolute value for src args.Matt Turner2013-12-041-0/+7
* i965/vec4: Add support for printing HW_REGs in dump_instruction().Matt Turner2013-12-041-0/+60
* i965/fs: Print ARF registers properly in dump_instruction().Matt Turner2013-12-041-2/+46
* i965: Don't print extra (null) arguments in dump_instruction().Matt Turner2013-12-042-4/+4
* i965: Allow commuting the operands of ADDC for const propagation.Matt Turner2013-12-042-2/+2
* i965/fs: Rename register_coalesce_2() -> register_coalesce().Matt Turner2013-12-042-6/+6
* i965/fs: Remove now useless register_coalesce() pass.Matt Turner2013-12-042-148/+0
* i965/fs: Let register_coalesce_2() eliminate self-moves.Matt Turner2013-12-041-1/+2
* i965: Allow constant propagation into ASR and BFI1.Matt Turner2013-12-042-0/+4
* i965/cfg: Document cur_* variables.Matt Turner2013-12-041-2/+5
* i965/cfg: Remove ip & cur from brw_cfg.Matt Turner2013-12-042-26/+17
* i965/cfg: Clean up cfg_t constructors.Matt Turner2013-12-049-23/+9
* i965/cfg: Throw out confusing make_list method.Matt Turner2013-12-042-15/+7
* i965/cfg: Include only needed headers.Matt Turner2013-12-042-2/+3
* i965/cfg: Remove unnecessary endif_stack.Matt Turner2013-12-041-3/+1
* i965/cfg: Rework to make IF & ELSE blocks flow into ENDIF.Matt Turner2013-12-042-15/+25
* i965/cfg: Keep pointers to IF/ELSE/ENDIF instructions in the cfg.Matt Turner2013-12-042-3/+38
* i965/cfg: Add code to dump blocks and cfg.Matt Turner2013-12-042-0/+37
* mesa: Remove support for GL_MESA_texture_arrayIan Romanick2013-12-046-45/+0
* mesa: Use a single enable for GL_EXT_texture_array and GL_MESA_texture_arrayIan Romanick2013-12-0414-57/+29
* mesa: Minor clean-up of target_enum_to_indexIan Romanick2013-12-041-6/+6
* mesa: Silence GCC warning in count_tex_sizeIan Romanick2013-12-041-0/+2
* mesa: Silence GCC warning in _mesa_test_texobj_completenessIan Romanick2013-12-041-1/+1
* mesa: Add missing API check for GL_TEXTURE_3DIan Romanick2013-12-041-1/+1
* mesa: Add missing checks for GL_TEXTURE_CUBE_MAP_ARRAYIan Romanick2013-12-041-1/+2
* mesa: reduce memory used for short display listsBrian Paul2013-12-041-0/+35
* mesa: update/remove display list commentsBrian Paul2013-12-041-16/+5
* mesa: remove gl_dlist_node::next pointer to reduce dlist memory useBrian Paul2013-12-041-8/+10
* mesa: begin reducing memory used by display listsBrian Paul2013-12-041-172/+252
* mesa: modified _mesa_align_free() to accept NULL pointerSiavash Eliasi2013-12-047-32/+26
* mesa: don't leak performance monitors on context destroyIlia Mirkin2013-12-043-0/+23
* i965: Fix BRW_BATCH_STRUCT to specify RENDER_RING, not UNKNOWN_RING.Kenneth Graunke2013-12-031-2/+2
* Revert "i965: Move brw_emit_query_begin() to the render ring prelude."Kenneth Graunke2013-12-032-7/+3
* i965: Fix OACONTROL assertion failures on Ironlake.Kenneth Graunke2013-12-031-4/+8
* mesa: resolve typo DTXn/DXTnEmil Velikov2013-12-031-1/+1
* i965: Add extra-alignment for non-msrt fast color clear for all hw (v2)Chad Versace2013-12-031-24/+11
* st/mesa: implement layered framebuffer clear for the clear_with_quad fallbackMarek Olšák2013-12-032-16/+43
* gallium: add support for AMD_vertex_shader_layerMarek Olšák2013-12-032-0/+11
* st/mesa: add support for layered framebuffers and consolidate codeMarek Olšák2013-12-036-93/+99
* mesa: expose AMD_vertex_shader_layer in the core profile onlyMarek Olšák2013-12-031-1/+1
* i965: Skip the register write check on Broadwell.Kenneth Graunke2013-12-021-1/+5