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* i965: Fix gl_FragCoord inversion when drawing to an FBO.Eric Anholt2010-11-143-3/+6
| | | | | | This showed up as cairo-gl gradients being inverted on everyone but Intel, where I'd apparently tweaked the transformation to work around the bug. Fixes piglit fbo-fragcoord.
* i965: Silence uninitialized variable warning.Vinson Lee2010-11-131-0/+1
| | | | | | Silences this GCC warning. brw_fs.cpp: In member function 'void fs_visitor::split_virtual_grfs()': brw_fs.cpp:2516: warning: unused variable 'reg'
* mesa: Clean up header file inclusion in points.h.Vinson Lee2010-11-131-1/+3
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* mesa: consolidate assertions in teximage codeBrian Paul2010-11-121-10/+1
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* gallium: add CAPs for indirect addressing and lower it in st/mesa when neededMarek Olšák2010-11-121-0/+9
| | | | | | | | | | Required because ATI and NVIDIA DX9 GPUs do not support indirect addressing of temps, inputs, outputs, and consts (FS-only) or the hw support is so limited that we cannot use it. This should make r300g and possibly nvfx more feature complete. Signed-off-by: Marek Olšák <[email protected]>
* tdfx: s/Format/_BaseFormat/Brian Paul2010-11-111-2/+2
| | | | Fixes http://bugs.freedesktop.org/show_bug.cgi?id=31560
* mesa: fix glDeleteBuffers() regressionBrian Paul2010-11-111-2/+2
| | | | | | | | This fixes a regression (failed assertion) from commit c552f273f559968dfd770367e25329baccbcd0c4 which was hit if glDeleteBuffers() was called on a buffer that was never bound. NOTE: this is a candidate for the 7.9 branch.
* mesa: make glIsBuffer() return false for never bound buffersBrian Paul2010-11-111-14/+18
| | | | | | | Use a dummy buffer object as we do for frame/renderbuffer objects. Fixes http://bugs.freedesktop.org/show_bug.cgi?id=31514 Note: this is a candidate for the 7.9 branch.
* mesa: handle more pixel types in mipmap generation codeBrian Paul2010-11-111-0/+166
| | | | NOTE: This is a candidate for the 7.9 branch.
* mesa: add missing formats in _mesa_format_to_type_and_comps()Brian Paul2010-11-111-1/+26
| | | | NOTE: this is a candidate for the 7.9 branch
* mesa: improve error messageBrian Paul2010-11-111-1/+2
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* mesa: #include mfeatures.h in enums.hBrian Paul2010-11-111-0/+1
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* dri/nouveau: Split hardware/software TNL instantiation more cleanly.Francisco Jerez2010-11-119-66/+84
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* mesa: Fix printf format warnings.Vinson Lee2010-11-101-1/+1
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* mesa: Allow query of MAX_SAMPLES with EXT_framebuffer_multisampleIan Romanick2010-11-101-2/+2
| | | | | | | | | | | | | Previously queries of MAX_SAMPLES were only allowed with ARB_framebuffer_object, but EXT_framebuffer_multisample also enables this query. This seems to only effect the i915. All other drivers support both extensions or neither extension. This patch is based on a patch that Kenneth sent along with the report. NOTE: this is a candidate for the 7.9 branch. Reported-by: Kenneth Waters <[email protected]>
* intel: Add a new B43 pci id.Robert Hooker2010-11-102-1/+4
| | | | Signed-off-by: Robert Hooker <[email protected]>
* i965: re-enable gen6 IF statements in the fragment shader.Eric Anholt2010-11-102-6/+1
| | | | | | | | | | | | | | | | | | IF statements were getting flattened while they were broken. With Zhenyu's last fix for ENDIF's type, everything appears to have lined up to actually work. This regresses two tests: glsl1-! (not) operator (1, fail) glsl1-! (not) operator (1, pass) but fixes tests that couldn't work before because the IFs couldn't be flattened: glsl-fs-discard-01 occlusion-query-discard (and, naturally, this should be a performance improvement for apps that actually use IF statements to avoid executing a bunch of code).
* i965: Work around strangeness in swizzling/masking of gen6 math.Eric Anholt2010-11-101-11/+58
| | | | | | | | | | | | | | | | | | | | Sometimes we swizzled in a different channel it looked like, and sometimes we swizzled in zero. Or something. Having looked at the output of another code generator for this chip, this is approximately what they do, too: use align1 math on temporaries, and then move the results into place. Fixes: glean/vp1-EX2 test glean/vp1-EXP test glean/vp1-LG2 test glean/vp1-RCP test (reciprocal) glean/vp1-RSQ test 1 (reciprocal square root) shaders/glsl-cos shaders/glsl-sin shaders/glsl-vs-masked-cos shaders/vpfp-generic/vp-exp-alias
* meta: Handle bitmaps with alpha test enabled.Francisco Jerez2010-11-101-6/+35
| | | | Acked-by: Brian Paul <[email protected]>
* mesa: remove unneeded DD_POINT_SIZE and DD_LINE_WIDTH tricapsRoland Scheidegger2010-11-104-16/+3
| | | | | | | | DD_POINT_SIZE was broken for quite some time, and the only driver (r200) relying on this no longer needs it. Both DD_POINT_SIZE and DD_LINE_WIDTH have no users left outside of debugging output, hence instead of fixing DD_POINT_SIZE setting just drop both of them - there was a plan to remove tricaps flags entirely at some point.
* r200: fix r200 large pointsRoland Scheidegger2010-11-102-7/+5
| | | | | | | | | | | | | | | | | | | | DD_POINT_SIZE got never set for some time now (as it was set only in ifdefed out code), which caused the r200 driver to use the point primitive mistakenly in some cases which can only do size 1 instead of point sprite. Since the logic to use point instead of point sprite prim is flaky at best anyway (can't work correctly for per-vertex point size), just drop this and always emit point sprites (except for AA points) - reasons why the driver tried to use points for size 1.0 are unknown though it is possible they are faster or more conformant. Note that we can't emit point sprites without point sprite cntl as that might result in undefined point sizes, hence need drm version check (which was unnecessary before as it should always have selected points). An alternative would be to rely on the RE point size clamp controls which could clamp the size to 1.0 min/max even if the SE point size is undefined, but currently always use 0 for min clamp. (As a side note, this also means the driver does not honor the gl spec which mandates points, but not point sprites, with zero size to be rendered as size 1.) This should fix recent reports of https://bugs.freedesktop.org/show_bug.cgi?id=702. This is a candidate for the mesa 7.9 branch.
* mesa: Clean up header file inclusion in pixelstore.h.Vinson Lee2010-11-101-1/+2
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* mesa: Clean up header file inclusion in pixel.h.Vinson Lee2010-11-101-1/+6
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* Revert "i965: VS use SPF mode on sandybridge for now"Zhenyu Wang2010-11-102-5/+1
| | | | | | This reverts commit 9c39a9fcb2c76897e9b5aff68ce197a411c4e25c. Remove VS SPF mode, conditional instruction works for VS now.
* i965: fix dest type of 'endif' on sandybridgeZhenyu Wang2010-11-101-1/+1
| | | | That should also be immediate value for type W.
* i965: Add support for math on constants in gen6 brw_wm_glsl.c path.Eric Anholt2010-11-091-4/+5
| | | | Fixes 10 piglit cases that were assertion failing.
* ir_to_mesa: Refactor code for emitting DP instructionsIan Romanick2010-11-091-45/+35
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* i965: Allow OPCODE_SWZ to put immediates in the first arg.Eric Anholt2010-11-091-0/+1
| | | | | | | | | | | Fixes assertion failure with texture swizzling in the GLSL path when it's triggered (such as gen6 FF or ARB_fp shadow comparisons). Fixes: texdepth texSwizzle fp1-DST test fp1-LIT test 3
* intel: Add assert check for blitting alignment.Peter Clifton2010-11-091-2/+3
| | | | | | Also fixup code comment to reflect that the GPU requires DWORD alignment, but in this case does not actually pass the value "in DWORDs" as I previously stated.
* Revert "intel: Fix the client-side swapbuffers throttling."Eric Anholt2010-11-091-5/+1
| | | | | | | This reverts commit 76360d6abc9e0195bc5c373101ae616e68b2e6e6. On second thought, it turned out that sync objects also used the wait_rendering API like this, and would need the same treatment, and so wait_rendering itself is fixed in libdrm now.
* intel: Fix the client-side swapbuffers throttling.Eric Anholt2010-11-091-1/+5
| | | | | | | We were asking for a wait to GTT read (all GPU rendering to it complete), instead of asking for all GPU reading from it to be complete. Prevents swapbuffers-based apps from running away with rendering, and produces a better input experience.
* mesa: no-op glBufferSubData() on size==0Brian Paul2010-11-091-0/+3
| | | | | | Fixes http://bugs.freedesktop.org/show_bug.cgi?id=31439 NOTE: this is a candidate for the 7.9 branch
* mesa: Clean up header file inclusion in nvprogram.h.Vinson Lee2010-11-091-1/+3
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* mesa: Clean up header file inclusion in multisample.h.Vinson Lee2010-11-091-1/+3
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* mesa: Clean up header file inclusion in matrix.h.Vinson Lee2010-11-091-1/+2
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* mesa: Clean up header file inclusion in lines.h.Vinson Lee2010-11-091-1/+2
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* mesa: Clean up header file inclusion in light.h.Vinson Lee2010-11-091-1/+6
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* mesa: Add missing header and forward declarations in dd.h.Vinson Lee2010-11-091-1/+13
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* mesa: Clean up header file inclusion in image.h.Vinson Lee2010-11-091-1/+3
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* mesa: Add talloc includes for glesThomas Hellstrom2010-11-091-2/+2
| | | | Signed-off-by: Thomas Hellstrom <[email protected]>
* mesa: Clean up header file inclusion in histogram.h.Vinson Lee2010-11-091-1/+4
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* mesa: Clean up header file inclusion in hint.h.Vinson Lee2010-11-091-1/+3
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* mesa: Clean up header file inclusion in framebuffer.h.Vinson Lee2010-11-091-1/+4
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* mesa: Clean up header file inclusion in fog.h.Vinson Lee2010-11-091-1/+4
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* mesa: Clean up header file inclusion in ffvertex_prog.h.Vinson Lee2010-11-091-1/+1
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* mesa: Clean up header file inclusion in fbobject.h.Vinson Lee2010-11-091-1/+4
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* radeon: Implement GL_OES_EGL_imageJohann Rudloff2010-11-0811-0/+150
| | | | agd5f: add support to radeon/r200/r300 as well
* radeon: Implement __DRI_IMAGE and EGL_MESA_image_drmJohann Rudloff2010-11-082-0/+196
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* radeon: Implement EGL_MESA_no_surface_extensionJohann Rudloff2010-11-082-37/+55
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* mesa/r300classic: Fix dri2Invalidate/radeon_prepare_render for page flipping.Mario Kleiner2010-11-082-2/+4
| | | | | | | | | | | | | | | | A call to radeon_prepare_render() at the beginning of draw operations was placed too deep in the call chain, inside r300RunRenderPrimitive(), instead of r300DrawPrims() where it belongs. This leads to emission of stale target color renderbuffer into the cs if bufferswaps via page-flipping are used, and thereby causes massive rendering corruption due to unsynchronized rendering into the active frontbuffer. This patch fixes such problems for use with the upcoming radeon page-flipping patches. Signed-off-by: Mario Kleiner <[email protected]>
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