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* glsl: Add a helper for generating temporary variables in ir_builder.Eric Anholt2012-04-131-31/+11
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Add a helper for ir_builder to make dereferences for assignments.Eric Anholt2012-04-131-49/+17
| | | | | | v2: Fix writemask setup for non-vec4 assignments. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Make a little tracking class for emitting IR lists.Eric Anholt2012-04-131-50/+28
| | | | | | | This lets us significantly shorten p->instructions->push_tail(ir), and will be used in a few more places. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Add common swizzles to ir_builder.Eric Anholt2012-04-131-48/+18
| | | | | | | | | | Now we can fold a bunch of our expression setup in ff_fragment_shader into single-line, parseable commits. v2: Make it actually work. I wasn't setting num_components in the mask structure, and not setting up a mask structure is way easier. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Let ir_builder expressions take un-dereferenced variables.Eric Anholt2012-04-131-13/+6
| | | | | | | | | | | Having to explicitly dereference is irritating and bloats the code, when the compiler can detect and do the right thing. v2: Use a little shim class to produce the automatic dereference generation at compile time as opposed to runtime, while also allowing compile-time type checking. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Create an ir_builder helper for hand-generating IR.Eric Anholt2012-04-131-82/+46
| | | | | | | | | | | | | | The C++ constructors with placement new, while functional, are extremely verbose, leading to generation of simple GLSL IR expressions like (a * b + c * d) expanding to many lines of code and using lots of temporary variables. By creating a new ir_builder.h that puts simple generators in our namespace and taking advantage of ralloc_parent(), we can generate much more compact code, at a minor runtime cost. v2: Replace ir_instruction usage with just ir_rvalue. v3: Drop remaining missed as_rvalue() in v2. Reviewed-by: Kenneth Graunke <[email protected]>
* nouveau: rework and simplify nv04/nv05 driver a bitBen Skeggs2012-04-148-300/+215
| | | | | | | | | | | | | | | TEXTURED_TRIANGLE and MULTITEX_TRIANGLE are both a bit special in that if you use any other graph object in the meantime they'll forget their state and spew a lovely METHOD_CNT error at you when you try to draw. The pre-newlib driver has a flush_notify() hook which does this state re-emit, and a number of random workarounds like extra flushes and state dirtying after various operations to solve this issue. I'm taking a slightly different approach to things instead, which has the nice side-effect of removing the divergent code-paths for ttri/mtri, the flush/dirty workarounds and the need for flush_notify. Also gives a few FPS boost in OA, yay.
* nouveau/vieux: switch to libdrm_nouveau-2.0Ben Skeggs2012-04-1446-1890/+1844
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* st/mesa: add ARB_blend_func_extended support to state tracker.Dave Airlie2012-04-133-5/+12
| | | | | | | | This adds the blend mode mapping, it also uses the var->index in the glsl to tgsi convertor - this is the other half of my using 4 in the GLSL compiler. Signed-off-by: Dave Airlie <[email protected]>
* mesa: add support for ARB_blend_func_extended (v4)Dave Airlie2012-04-138-6/+149
| | | | | | | | | | | | | | | | | | | | Add implementations of the two API functions, Add a new strings to uint mapping for index bindings Add the blending mode validation for SRC1 + SRC_ALPHA_SATURATE Add get for MAX_DUAL_SOURCE_DRAW_BUFFERS v2: Add check in valid_to_render to address case in spec ERRORS. v3: Add index to ir.h so this patch compiles on its own fixup comment v4: fixup Brian's comments The GLSL patch will setup the indices. Signed-off-by: Dave Airlie <[email protected]>
* i965: fix typoDylan Noblesmith2012-04-131-1/+1
| | | | | | | | | | | | | | | | | | Noticed by clang: brw_wm_surface_state.c:330:30: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides] [MESA_FORMAT_Z24_S8] = 0, ^ brw_wm_surface_state.c:326:30: note: previous initialization is here [MESA_FORMAT_Z24_S8] = 0, ^ No functionality change, since the array is declared static so it was zero-initialized by default. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* mesa: fix truncated value warningDylan Noblesmith2012-04-131-1/+1
| | | | | | | | | | | | Silences a clang warning: format_pack.c:2546:30: warning: implicit conversion from 'int' to 'GLubyte' (aka 'unsigned char') changes value from 65535 to 255 [-Wconstant-conversion] d[i] = d[i] ? 0xffff : 0x0; ~ ^~~~~~ Reviewed-by: Brian Paul <[email protected]>
* mesa: don't cast away constDylan Noblesmith2012-04-131-1/+1
| | | | Reviewed-by: Brian Paul <[email protected]>
* ir_to_mesa: Fix uninitialized member in add_uniform_to_shader.Vinson Lee2012-04-121-1/+1
| | | | | | | | | Fix uninitialized scalar field defect reported by Coverity. NOTE: This is a candidate for the 8.0 branch. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965: When the kernel lacks the LLC check, assume it's present on gen >= 6.Eric Anholt2012-04-111-3/+7
| | | | | The param wasn't added until drm-intel-next for 3.4, so we were missing our various LLC fast-paths.
* intel: Drop backwards compat code for not having libdrm with the LLC check.Eric Anholt2012-04-111-4/+0
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* i965/fs: Avoid generating extra AND instructions on bool logic ops.Eric Anholt2012-04-111-22/+14
| | | | | | | | | | | | | | | | | | | | | | | By making a bool fs_reg only have a defined low bit (matching CMP output), instead of being a full 0 or 1 value, we reduce the ANDs generated in logic chains like: if (v_texcoord.x < 0.0 || v_texcoord.x > texwidth || v_texcoord.y < 0.0 || v_texcoord.y > 1.0) discard; My concern originally when writing this code was that we would end up generating unnecessary ANDs on bool uniforms, so I put the ANDs right at the point of doing the CMPs that otherwise set only the low bit. However, in order to use a bool, we're generating some instruction anyway (e.g. moving it so as to produce a condition code update), and those instructions can often be turned into an AND at that point. It turns out in the shaders I have on hand, none of them regress in instruction count: Total instructions: 262649 -> 262545 39/2148 programs affected (1.8%) 14253 -> 14149 instructions in affected programs (0.7% reduction)
* i965/fs: Try to avoid generating extra MOVs to do saturates.Eric Anholt2012-04-113-12/+54
| | | | | | | | | | | | This change (before the previous two) produced a .23% +/- .11% performance improvement in Unigine Tropics at 1024x768 on IVB. Total instructions: 269270 -> 262649 614/2148 programs affected (28.6%) 179386 -> 172765 instructions in affected programs (3.7% reduction) v2: Move some of the logic of finding the instruction that produced the result of an expression tree to a helper.
* mesa: add _mesa_total_texture_memory() debug functionBrian Paul2012-04-112-0/+62
| | | | | This function can be called in gdb to find out how much memory is used by all texture objects.
* mesa: new _mesa_total_buffer_object_memory() debug functionBrian Paul2012-04-112-0/+32
| | | | | This function can be called in gdb to find out how much memory is used by buffer objects.
* i965: Stop lying about cpp and height of a stencil buffer.Paul Berry2012-04-105-45/+66
| | | | | | | | | | | | | | | | | | | | | | | When using a separate stencil buffer, i965 requires that the pitch of the buffer (in the 3DSTATE_STENCIL_BUFFER command) be specified as 2x the actual pitch. Previously this was accomplished by doubling the "cpp" and "pitch" values stored in the intel_region data structure, and halving the height. However, this was confusing, and it led to a subtle (but benign) bug: since a stencil buffer is W-tiled, its true height must be aligned to a multiple of 64; we were accidentally aligning its faux height to a multiple of 64, causing memory to be wasted. Note that for window system stencil buffers, the DDX also doubles the cpp and pitch values. To facilitate fixing this DDX server bug in the future, we fix the cpp and pitch values we receive from the X server only if cpp has the "incorrect" value of 2. Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]> v2: Clarify comments about the DDX.
* st/mesa: Fix uninitialized members in glsl_to_tgsi_visitor constructor.Vinson Lee2012-04-091-0/+4
| | | | | | | | | Fixes uninitialized member defects reported by Coverity. NOTE: This is a candidate for the 8.0 branch. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* main: Fix memory leak in _mesa_make_extension_string()Chad Versace2012-04-091-0/+2
| | | | | | | | | I forgot to free the string returned by strdup(). Note: This is a candidate for the stable branches. CC: Johannes Obermayr <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965: Add support for sampling texture buffer objects on gen7+.Eric Anholt2012-04-094-1/+71
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add real support for texturing/rendering with MESA_FORMAT_RGBA8888_REV.Eric Anholt2012-04-091-5/+1
| | | | | | | | | | | This was hacked in in one place for EGL image stuff, but the right thing to do was just to provide the mapping from the mesa format to the native hardware format, which includes render target support. This turns out to be required for GL_ARB_texture_buffer_object, which sees data in this layout. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen7: Fix the /* ignored */ comment on constant surface setup.Eric Anholt2012-04-091-1/+1
| | | | | | | It turns out this field *is* used, and it's the stride between samples from the buffer. Discovered during TBO debugging. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Add support for the GL 3.1 R/RG formats in texture buffer objects.Eric Anholt2012-04-091-0/+54
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Track a gl_format for the texture buffer format.Eric Anholt2012-04-093-168/+76
| | | | | | | | | | | There was a function full of unused mappings from the GLenum to datatype/comps, but that wasn't all the information a driver would want, which includes the other fields that a gl_format has. Given that all the texture buffer formats were represented in gl_format, just use that as our description. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Handle updating texture state for buffer textures.Eric Anholt2012-04-092-0/+12
| | | | | | | | | We have to skip some work that wants to look at texture images, since buffer textures don't have any of that complexity. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Create the default (name==0) buffer texture.Eric Anholt2012-04-091-0/+5
| | | | | | | | All that should be needed is that it exists. Fixes segfaults on first _mesa_update_context() with a samplerBuffer-using shader active but without a particular buffer texture enabled. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Set the correct initial value of the texture buffer object format.Eric Anholt2012-04-091-0/+1
| | | | | | | Fixes piglit GL_ARB_texture_buffer_object/get Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Set up glTexBuffer{,ARB} for display list compile.Eric Anholt2012-04-091-0/+3
| | | | | | | | We're supposed to just immediately call it. Fixes piglit GL_ARB_texture_buffer_object/dlist Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glapi: regen for TBO change.Eric Anholt2012-04-092-2890/+2872
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* ff_fragment_shader: Remove some dead fields.Eric Anholt2012-04-091-11/+0
| | | | Reviewed-by: Brian Paul <[email protected]>
* x86-64: Don't print "Initializing x86-64 optimizations" in debug builds.Kenneth Graunke2012-04-091-11/+1
| | | | | | | | | | In "release" builds, Mesa would print this message if the MESA_DEBUG variable was set. Make it so for debug builds as well. I build debug builds all the time, but I'm not debugging this. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* ir_to_mesa: Remove pretense of support for function calls.Kenneth Graunke2012-04-091-181/+5
| | | | | | | | | | | | | | | | | While ir_to_mesa contains code that attempts to support functions, I honestly doubt it's been tested and have little confidence that it works. The comment in visit(ir_function *ir) doesn't inspire confidence: /* Ignore function bodies other than main() -- we shouldn't see calls to * them since they should all be inlined before we get to ir_to_mesa. */ Furthermore, hardware drivers such as i915, i965, and (AFAICT) r200 don't support the BGNSUB/ENDSUB/CAL opcodes anyway. Only swrast does. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Remove vestiges of function call support from the old VS backend.Kenneth Graunke2012-04-094-188/+0
| | | | | | | | This never worked. brwProgramStringNotify also explicitly rejects programs that use CAL and RET. So there's no need for this to exist. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i915: set SPRITE_POINT_ENABLE bit correctlyYuanhan Liu2012-04-094-12/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When SPRITE_POINT_ENABLE bit is set, the texture coord would be replaced, and this is only needed when we called something like glTexEnvi(GL_POINT_SPRITE, GL_COORD_REPLACE, GL_TRUE). And more, we currently handle varying inputs as texture coord, we would be careful when setting this bit and set it just when needed, or you will find the value of varying input is not right and changed. Thus we do set SPRITE_POINT_ENABLE bit only when all enabled tex coord units need do CoordReplace. Or fallback is needed to make sure the rendering is right. With handling the bit setup at i915_update_sprite_point_enable(), we don't need the relative code at i915Enable then. This patch would _really_ fix the webglc point-size.html test case and of course, not regress piglit point-sprite and glean-pointSprite testcase. NOTE: This is a candidate for stable release branches. v2: fallback just when all enabled tex coord units need do CoordReplace (Eric) v3: move the sprite point validate code at I915InvalidateState (Eric) v4: sprite point enable bit update based on _NEW_PROGRAM, too add relative _NEW-state comments to show what state is being used(Eric) Signed-off-by: Yuanhan Liu <[email protected]>
* st/mesa: fix max_offset computation for base vertexBrian Paul2012-04-061-2/+18
| | | | | | | | | | | | | | Add the maximum base vertex offset to max_index for computing the buffer size. Fixes a failed assertion in the u_upload_mgr.c code with the VMware svga driver. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=48141 v2: incorporate Marek's suggestions. NOTE: This is a candidate for the 8.0 branch. Reviewed-by: Marek Olšák <[email protected]>
* i965: Actually upload sampler state pointers for the VS unit on Gen6.Kenneth Graunke2012-04-051-1/+1
| | | | | | | | | | | | | | We already program all the sampler state correctly, we just didn't give the GPU a pointer to it for the VS stage. Thus, any texturing other than texelFetch() wouldn't work. Fixes piglit test vs-textureLod-miplevels and 99 of oglconform's glsl-bif-tex subtests. NOTE: This is a candidate for the 8.0 branch. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* swrast: Fix memory leaks in blit_linear.Vinson Lee2012-04-021-0/+9
| | | | | | | | | Fixes Coverity resource leak defects. NOTE: This is a candidate for the 8.0 branch. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* glsl: Demote 'type' from ir_instruction to ir_rvalue and ir_variable.Kenneth Graunke2012-04-021-1/+1
| | | | | | | | | | | | | Variables have types, expression trees have types, but statements don't. Rather than have a nonsensical field that stays NULL in the base class, just move it to where it makes sense. Fix up a few places that lazily used ir_instruction even though they actually knew the particular subclass. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Remove ir_call::get_callee() and set_callee().Kenneth Graunke2012-04-022-2/+2
| | | | | | | | | | | | | Previously, set_callee() performed some assertions about the type of the ir_call; protecting the bare pointer ensured these checks would be run. However, ir_call no longer has a type, so the getter and setter methods don't actually do anything useful. Remove them in favor of accessing callee directly, as is done with most other fields in our IR. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/aub: Dump a final bitmap from DestroyContext.Kenneth Graunke2012-04-023-29/+41
| | | | | | | | | | | | | | | Certain applications don't call SwapBuffers before exiting. Yet, we'd really like to see a bitmap containing the final rendered image even if they choose never to present it. In particular, Piglit tests (at least with -auto -fbo) fall into this category. Many of them failed to dump any images at all. Dumping one final image at context destruction time seems to work. We may wish to pursue a more elegant solution later. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* intel: add PCI IDs for Ivy Bridge GT2 server variantEugeni Dodonov2012-04-012-1/+4
| | | | | | | Those IDs are used by Bromolow. Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Eugeni Dodonov <[email protected]>
* intel: Add some PCI IDs for Haswell.Kenneth Graunke2012-03-302-2/+20
| | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eugeni Dodonov <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Set "Shader Channel Select" fields in Haswell's SURFACE_STATE.Kenneth Graunke2012-03-303-1/+37
| | | | | | | | | | | | These can be used to implement EXT_texture_swizzle without baking state-dependent swizzle instructions into the shader and forcing recompiles. For now, just set them to pass-through mode, so everything continues to work as it did on Ivybridge. We can optimize this later. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Fill in Sample Mask in Haswell's 3DSTATE_PS.Kenneth Graunke2012-03-302-0/+5
| | | | | | | We only need one sample, since we don't support multisampling yet. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Set "Stencil Buffer Enable" bit on Haswell.Kenneth Graunke2012-03-302-1/+5
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Set Line Stipple enable bit in 3DSTATE_SF for Haswell.Kenneth Graunke2012-03-302-0/+5
| | | | | | | Apparently this needs to be the same as in 3DSTATE_WM. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
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