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* swrast: update renderbuffer format assertionsbrian2009-11-101-3/+4
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* mesa: fix some begin/end render-to-texture logicbrian2009-11-101-21/+38
| | | | | | | | | Before, we weren't aggressive enough in checking for the start or end of render-to-texture. In particular, if only the ctx->ReadBuffer had texture attachments, we were treating that as a render-to-texture case. This fixes a regression from commit 75bdbdd90b15c8704d87ca195a364ff6a42edbb1 "intel: Don't validate in a texture image used as a render target."
* mesa: move check_begin/end_texture_render() callsbrian2009-11-101-9/+11
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* mesa: new vars: oldDrawFb, oldReadFb in _mesa_BindFramebufferEXT()brian2009-11-101-3/+7
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* mesa: rename vars in _mesa_BindFramebufferEXT()brian2009-11-101-22/+21
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* mesa: added comment for check_begin_texture_render()brian2009-11-101-0/+5
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* Merge remote branch 'origin/mesa_7_6_branch'Eric Anholt2009-11-103-8/+77
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| * i965: Fix VS constant buffer value loading.Eric Anholt2009-11-101-1/+11
| | | | | | | | | | | | | | | | | | | | Previously, we'd load linearly from ParameterValues[0] for the constants, though ParameterValues[1] may not equal ParameterValues[0] + 4. Additionally, the STATE_VAL type paramters didn't get updated. Fixes piglit vp-constant-array-huge.vpfp and ET:QW object locations. Bug #23226.
| * i965: Unalias src/dst registers for SGE and friends.Eric Anholt2009-11-101-19/+21
| | | | | | | | | | | | | | Fixes piglit vp-sge-alias test, and the googleearth ground shader. \o/ Bug #22228 (cherry picked from commit 56ab92bad8f1d05bc22b8a8471d5aeb663f220de)
| * i965: Allow use of PROGRAM_LOCAL constants in ARB_vp.Eric Anholt2009-11-101-1/+1
| | | | | | | | | | Fixes piglit arl.vp. (cherry picked from commit d52d78b4bcd6d4c0578f972c0b8ebac09e632196)
| * r600: don't emit htile regsAlex Deucher2009-11-091-4/+2
| | | | | | | | | | | | These are needed for HiZ which is not currently used and the _BASE reg requires a reloc which is not currently supported in the drm.
| * prog parse: Handle GL_VERTEX_PROGRAM_ARB in glLoadProgramNVIan Romanick2009-11-071-1/+13
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| * prog parse: Handle GL_VERTEX_PROGRAM_NV in glProgramStringARBIan Romanick2009-11-071-1/+23
| | | | | | | | | | Handle both NV vertex programs and NV vertex state programs passed to glProgramStringARB.
| * prog parse: Handle GL_FRAGMENT_PROGRAM_ARB in glLoadProgramNVIan Romanick2009-11-071-0/+15
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| * prog parse: Handle GL_FRAGMENT_PROGRAM_NV in glProgramStringARBIan Romanick2009-11-071-5/+15
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* | i965: avoid memsetting all the BRW_WM_MAX_INSN arrays for every compile.Eric Anholt2009-11-104-4/+23
| | | | | | | | | | | | | | | | | | For an app that's blowing out the state cache, like sauerbraten, the memset of the giant arrays ended up taking 11% of the CPU even when only a "few" of the entries got used. With this, the WM program compile drops back down to 1% of CPU time. Bug #24981 (bisected to BRW_WM_MAX_INSN increase).
* | i965: Add a note explaining the data cache domain.Eric Anholt2009-11-101-1/+4
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* | i965: Unalias src/dst registers for SGE and friends.Eric Anholt2009-11-101-19/+21
| | | | | | | | | | | | Fixes piglit vp-sge-alias test, and the googleearth ground shader. \o/ Bug #22228
* | i965: Allow use of PROGRAM_LOCAL constants in ARB_vp.Eric Anholt2009-11-101-1/+1
| | | | | | | | Fixes piglit arl.vp.
* | slang: Fix return value check.Michal Krol2009-11-101-1/+1
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* | slang: Check OOM conditions for alloc_node_storage().Michal Krol2009-11-101-4/+15
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* | slang: Check return value from new_instruction().Michal Krol2009-11-101-1/+3
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* | slang: Fix signed/unsigned int handling in _slang_free_temp().Michal Krol2009-11-101-2/+2
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* | slang: Handle OOM condition in new_instruction().Michal Krol2009-11-101-20/+81
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* | r600/r700: typo, fix mask of DB_ALPHA_TO_MASKJerome Glisse2009-11-091-3/+3
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* | r600: rework DB render setupAlex Deucher2009-11-094-42/+73
| | | | | | | | | | | | | | - consolidate DB render setup - only enable perfect ZPASS counts and cull disable when OQ is active - enable early Z
* | r600: don't emit htile regsAlex Deucher2009-11-091-4/+2
| | | | | | | | | | | | These are needed for HiZ which is not currently used and the _BASE reg requires a reloc which is not currently supported in the drm.
* | r600: add missing ZPASS setup bits for r7xx+Alex Deucher2009-11-092-0/+6
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* | mesa: move code after declbrian2009-11-071-1/+2
| | | | | | | | Fixes bug 24967.
* | i965: Use Compr4 instruction compression mode on G4X and newer.Eric Anholt2009-11-063-17/+29
| | | | | | | | | | | | | | No statistically significant performance difference at n=3 with either openarena or my GL demo, but cutting program size seems like a good thing to be doing for the hypothetical app that has a working set near icache size.
* | i965: Share min/max between brw_wm_emit.c and brw_wm_glsl.cEric Anholt2009-11-063-60/+72
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* | i965: Share emit_fb_write() between brw_wm_emit.c and brw_wm_glsl.cEric Anholt2009-11-064-127/+40
| | | | | | | | This should fix issues with antialiased lines in GLSL.
* | i965: Share most of the WM functions between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-063-297/+109
| | | | | | | | | | The PINTERP code should be faster for brw_wm_glsl.c now since brw_wm_emit.c's had been improved, and pixel_w should no longer stomp on a neighbor to dst.
* | i965: Share math functions between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt2009-11-063-221/+111
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* | i965: Share the sop opcodes between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt2009-11-063-74/+29
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* | i965: Share OPCODE_MAD between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-063-30/+13
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* | i965: Share the DP3, DP4, and DPH between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-063-99/+33
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* | i965: Add generic GLSL code for unaliasing a 3-arg opcode, and share LRP code.Eric Anholt2009-11-063-45/+71
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* | i965: Use a normal alu1 emit for OPCODE_TRUNC.Eric Anholt2009-11-062-34/+2
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* | i965: Share basic ALU ops between brw_wm_glsl and brw_wm_emit.cEric Anholt2009-11-063-117/+38
| | | | | | | | | | This drops support for get_src_reg_imm in these, but the prospect of getting brw_wm_pass*.c onto our GLSL path is well worth some temporary pain.
* | i965: Collect GLSL src/dst regs up in generic code.Eric Anholt2009-11-062-7/+17
| | | | | | | | | | | | | | | | This matches brw_wm_emit.c, which we'll be using shortly. There's a possible penalty here in that we'll allocate registers for unused channels, since we aren't doing ref tracking like brw_wm_pass*.c does. However, my measurements on GM965 don't show any for either OA or UT2004 with the GLSL path forced.
* | mesa: Reduce the source channels considered in optimization passes.Eric Anholt2009-11-061-1/+40
| | | | | | | | | | | | | | Depending on the writemask or the opcode, we can often trim the source channels considered used for dead code elimination. This saves actual instructions on 965 in the non-GLSL path for glean glsl1, and cleans up the writemasks of programs even further.
* | mesa: Fix remove_instructions to successfully remove when removeFlags[0].Eric Anholt2009-11-061-0/+6
| | | | | | | | | | This fixes the dead code elimination to work on the particular code mentioned in the previous commit.
* | mesa: Add an optimization path to remove use of pointless MOVs.Eric Anholt2009-11-061-1/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GLSL code such as: vec4 result = {0, 1, 0, 0}; gl_FragColor = result; emits code like: 0: MOV TEMP[0], CONST[0]; 1: MOV OUTPUT[1], TEMP[0]; and this replaces it with: 0: MOV TEMP[0], CONST[0]; 1: MOV OUTPUT[1], CONST[0]; Even when the dead code eliminator fails to clean up a now-useless MOV instruction (since it doesn't do live/dead ranges), this should at reduce dependencies.
* | mesa: Fix up the remove_dead_code pass to operate on a channel basis.Eric Anholt2009-11-061-28/+56
| | | | | | | | | | | | | | This cleans up a bunch of instructions in GLSL programs to have limited writemasks, which would translate to wins in shaders that hit the i965 brw_wm_glsl.c path by depending less on in-driver optimizations. It will also help hit other optimization passes I'm looking at.
* | intel: better front color buffer test in intelClear()Brian Paul2009-11-061-2/+3
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* | i965: Always pass the size argument to brw_cache_data.Eric Anholt2009-11-066-57/+21
| | | | | | | | | | This keeps the individual state files from having to export their structures for brw_state_cache initialization.
* | intel: Finish removing the fallback code for bug #16697.Eric Anholt2009-11-061-6/+2
| | | | | | | | I fixed it properly as of 7216679c1998b49ff5b08e6b43f8d5779415bf54.
* | intel: Don't validate in a texture image used as a render target.Eric Anholt2009-11-063-11/+15
| | | | | | | | | | Otherwise, we could lose track of rendering to that image, which could easily happen during mipmap generation.
* | mesa: Attempt to pair up Driver.RenderTexture and FinishRenderTexture()Eric Anholt2009-11-061-0/+4
| | | | | | | | | | | | | | | | | | | | This is probably not 100% complete (bind vs unbind may still not pair up exactly), but it should help out drivers which are relying on FinishRenderTexture to be called when we're done rendering to a particular texture level, not just when we're done rendering to the object at all. This is the case for the one consumer of FinishRenderTexture() so far: the gallium state tracker. Noticed when trying to make use of FRT() in the intel driver.
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