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* mesa: Increment the list pointer while freeing instruction dataIan Romanick2014-01-241-0/+1
* st/mesa: add a simple sanity check assertion in st_validate_attachment()Brian Paul2014-01-241-0/+6
* i965/gen7: Use to the correct program when uploading transform feedback state.Paul Berry2014-01-232-10/+6
* mesa: Ensure that transform feedback refers to the correct program.Paul Berry2014-01-232-15/+45
* i965: Remove *_generator::shader field; use prog field instead.Paul Berry2014-01-237-18/+8
* st/mesa: fix glReadBuffer(GL_NONE) segfaultBrian Paul2014-01-231-1/+2
* driconf: Add Catalan translationsAlex Henrie2014-01-232-1/+322
* driconf: Correct and update Spanish translationsAlex Henrie2014-01-231-31/+33
* driconf: Synchronize po filesAlex Henrie2014-01-235-357/+702
* mesa: Set gl_constants::MinMapBufferAlignmentIan Romanick2014-01-231-0/+1
* radeon / r200: Eliminate BEGIN_BATCH_NO_AUTOSTATEIan Romanick2014-01-2311-32/+27
* radeon / r200: Remove unused 'dostate' parameterIan Romanick2014-01-232-4/+2
* radeon / r200: Fix 'empty body' warningIan Romanick2014-01-231-2/+2
* radeon / r200: Fix incompatible pointer type warningIan Romanick2014-01-231-2/+1
* mesa: whitespace fixes in glformats.cBrian Paul2014-01-231-75/+51
* mesa: rename unbind_texobj_from_imgunits()Brian Paul2014-01-231-4/+4
* mesa: initialize "is_layered" variable to silence warningBrian Paul2014-01-231-1/+1
* mesa: fix/add some cases in _mesa_get_linear_internalformat()Brian Paul2014-01-231-1/+7
* mesa: add missing ETC2_SRGB cases in formats.cBrian Paul2014-01-231-0/+12
* mesa: Add ARB_arrays_of_arraysTimothy Arceri2014-01-232-0/+2
* i965/blorp: switch eu-emitter to use FS IR and fs_generatorTopi Pohjolainen2014-01-233-120/+84
* i965/fs: add support for BRW_OPCODE_AVG in fs_generatorTopi Pohjolainen2014-01-231-0/+3
* i965/fs: introduce blorp specific rt-write for fs_generatorTopi Pohjolainen2014-01-234-0/+23
* i965/fs: allow unit tests to dump the final patched assemblyTopi Pohjolainen2014-01-232-8/+10
* i965/blorp: wrap brw_IF/ELSE/ENDIF() into eu-emitterTopi Pohjolainen2014-01-232-9/+23
* i965/blorp: wrap RNDD (/brw_RNDD(&func, /emit_rndd(/)Topi Pohjolainen2014-01-232-2/+8
* i965/blorp: wrap FRC (/brw_FRC(&func, /emit_frc(/)Topi Pohjolainen2014-01-232-4/+10
* i965/blorp: wrap MUL (/brw_MUL(&func, /emit_mul(/)Topi Pohjolainen2014-01-232-9/+16
* i965/blorp: wrap OR (/brw_OR(&func, /emit_or(/)Topi Pohjolainen2014-01-232-24/+31
* i965/blorp: wrap SHL (/brw_SHL(&func, /emit_shl(/)Topi Pohjolainen2014-01-232-12/+19
* i965/blorp: wrap SHR (/brw_SHR(&func, /emit_shr(/)Topi Pohjolainen2014-01-232-12/+19
* i965/blorp: wrap ADD (/brw_ADD(&func, /emit_add(/)Topi Pohjolainen2014-01-232-18/+32
* i965/blorp: wrap AND (/brw_AND(&func, /emit_and(/)Topi Pohjolainen2014-01-232-39/+46
* i965/blorp: wrap MOV (/brw_MOV(&func, /emit_mov(/)Topi Pohjolainen2014-01-232-35/+45
* i965/blorp: wrap emission of if-equal-assignmentTopi Pohjolainen2014-01-232-24/+12
* i965/blorp: wrap emission of conditional assignmentTopi Pohjolainen2014-01-232-15/+15
* i965/blorp: move emission of sample combining into eu-emitterTopi Pohjolainen2014-01-233-9/+24
* i965/blorp: move emission of rt-write into eu-emitterTopi Pohjolainen2014-01-233-10/+28
* i965/blorp: move emission of texture lookup into eu-emitterTopi Pohjolainen2014-01-233-22/+60
* i965/fs: introduce non-compressed equivalent of tex_cmsTopi Pohjolainen2014-01-234-0/+13
* i965: rename tex_ms to tex_cmsTopi Pohjolainen2014-01-2310-17/+17
* i965/blorp: move emission of pixel kill into eu-emitterTopi Pohjolainen2014-01-233-25/+38
* i965/blorp: introduce separate eu-emitter for blit compilerTopi Pohjolainen2014-01-234-38/+113
* i965: Support 32 texture image units on Haswell+.Kenneth Graunke2014-01-222-4/+7
* i965/fs: Switch from BRW_MAX_TEX_UNIT to the actual limit.Kenneth Graunke2014-01-221-1/+2
* mesa: Bump MAX_TEXTURE_IMAGE_UNITS to 32.Kenneth Graunke2014-01-221-1/+1
* i965/vec4: Support arbitrarily large sampler state indices on Haswell+.Kenneth Graunke2014-01-222-3/+26
* i965/vec4: Refactor sampler message setup.Kenneth Graunke2014-01-221-17/+22
* i965/vec4: Don't set header_present if texel offsets are all 0.Kenneth Graunke2014-01-221-9/+8
* i965/fs: Support arbitrarily large sampler state indices on Haswell+.Kenneth Graunke2014-01-222-2/+22