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* i965/fs: Allocate single register at a time for constants.Matt Turner2016-02-041-3/+3
| | | | | | | | | | | | | | | | | No instruction counts changed, but: total cycles in shared programs: 64834502 -> 64781530 (-0.08%) cycles in affected programs: 16331544 -> 16278572 (-0.32%) helped: 4757 HURT: 4288 GAINED: 66 LOST: 20 I remember trying this when I first wrote the pass, but it wasn't helpful at the time. Reviewed-by: Francisco Jerez <[email protected]>
* mesa: Use SSE prefetch instructions rather than 3DNow instructionsPatrick Baggett2016-02-041-20/+20
| | | | | | | | | | 64-bit Pentium 4 CPUs don't have the 3DNow prefetch instructions which results in an Illegal instruction crash. Cc: "11.0 11.1" <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Tested-by: Timothy Arceri <[email protected]> https://bugs.freedesktop.org/show_bug.cgi?id=27512
* st/mesa: fix potential null deref if no shader is passed inIlia Mirkin2016-02-031-1/+3
| | | | | | | Spotted by Coverity Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* st/mesa: implement PBO upload for glCompressedTex(Sub)ImageNicolai Hähnle2016-02-031-0/+115
| | | | | | | v2: - use st->pbo_upload.enabled flag Reviewed-by: Edward O'Callaghan <[email protected]>
* st/mesa: redirect CompressedTexSubImage to our own implementationNicolai Hähnle2016-02-031-6/+18
| | | | | | This is where PBO upload will go. Reviewed-by: Edward O'Callaghan <[email protected]>
* st/mesa: inline the implementation of _mesa_store_compressed_teximageNicolai Hähnle2016-02-031-1/+27
| | | | | | | We will write our own version of texsubimage for PBO uploads, and we will want to call that here as well. Reviewed-by: Edward O'Callaghan <[email protected]>
* st/mesa: implement PBO upload for multiple layersNicolai Hähnle2016-02-032-19/+143
| | | | | | | | | | Use instancing to generate two triangles for each destination layer and use a geometry shader to route the layer index. v2: - directly write layer in VS if supported by the driver (Marek Olšák) Reviewed-by: Edward O'Callaghan <[email protected]>
* st/mesa: Accelerate PBO uploadsFredrik Höglund2016-02-034-9/+898
| | | | | | | | | | | | | | | | | | | | | | Create a PIPE_BUFFER sampler view on the pixel-unpack buffer, and draw the image on the texture with a fragment shader that maps fragment coordinates to buffer coordinates. Modifications by Nicolai Hähnle: - various cleanups and fixes (e.g. error handling, corner cases) - split try_pbo_upload into two functions, which will allow code to be shared with compressed texture uploads - modify the source format selection to only test for support against the PIPE_BUFFER target v2: - update handling of TGSI_SEMANTIC_POSITION for recent changes in master - MaxTextureBufferSize is number of texels, not bytes (Ilia Mirkin) - only enable when integers are supported (Marek Olšák) - try harder to hit the TextureBufferOffsetAlignment - remove unnecessary MOV from the fragment shader Reviewed-by: Edward O'Callaghan <[email protected]>
* st/mesa: use the correct address generation functions in st_TexSubImage blitNicolai Hähnle2016-02-031-5/+5
| | | | | | | | | | | | | | | | | | We need to tell the address generation functions about the dimensionality of the texture to correctly implement the part of Section 3.8.1 (Texture Image Specification) of the OpenGL 2.1 specification which says: "For the purposes of decoding the texture image, TexImage2D is equivalent to calling TexImage3D with corresponding arguments and depth of 1, except that ... * UNPACK SKIP IMAGES is ignored." Fixes a low impact bug that was found by chance while browsing the spec and extending piglit tests. Cc: "11.0 11.1" <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* mesa: add MESA_NO_MINMAX_CACHE environment variableNicolai Hähnle2016-02-031-0/+22
| | | | | | | | | | When set to a truish value, this globally disables the minmax cache for all buffer objects. No #ifdef DEBUG guards because this option can be interesting for benchmarking. Reviewed-by: Marek Olšák <[email protected]>
* vbo: disable the minmax cache when the hit rate is lowNicolai Hähnle2016-02-032-2/+34
| | | | | | | | | | | | | | | | | | When applications stream their index buffers, the caches for those BOs become useless and add overhead, so we want to disable them. The tricky part is coming up with the right heuristic for *when* to disable them. The first question is which hit rate to aim for. Since I'm not aware of any interesting borderline applications that do something like "draw two or three times for each upload", I just kept it simple. The second question is how soon we should give up on the caching. Applications might have a warm-up phase where they fill a buffer gradually but then keep reusing it. For this reason, I count the number of indices that hit and miss (instead of the number of calls that hit or miss), since comparing that to the size of the buffer makes sense. Reviewed-by: Marek Olšák <[email protected]>
* mesa: add USAGE_DISABLE_MINMAX_CACHE flag to buffer UsageHistoryNicolai Hähnle2016-02-032-1/+3
| | | | Reviewed-by: Marek Olšák <[email protected]>
* vbo: cache/memoize the result of vbo_get_minmax_indices (v3)Nicolai Hähnle2016-02-034-1/+186
| | | | | | | | | | | | | | | | | | | | | | | | | Some games developers are unaware that an index buffer in a VBO still needs to be read by the CPU if some varying data comes from a user pointer (unless glDrawRangeElements and friends are used). This is particularly bad when they tell us that the index buffer should live in VRAM. This cache helps, e.g. lifting This War Of Mine (a particularly bad offender) from under 10fps to slightly over 20fps on a Carrizo. Note that there is nothing prohibiting a user from rendering from multiple threads simultaneously with the same index buffer, hence the locking. (The internal buffer map taken for the buffer still leads to a race, but at least the locks are a move in the right direction.) v2: disable the cache on USAGE_TEXTURE_BUFFER as well (Chris Forbes) v3: - use bool instead of GLboolean for MinMaxCacheDirty (Ian Romanick) - replace the sticky USAGE_PERSISTENT_WRITE_MAP bit by a direct AccessFlags check Reviewed-by: Chris Forbes <[email protected]> (v2) Reviewed-by: Marek Olšák <[email protected]>
* vbo: move vbo_get_minmax_indices into its own source fileNicolai Hähnle2016-02-033-148/+180
| | | | | | | | We will add more code for caching/memoization. Moving the existing code into its own file helps keep things modular. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa/main: bail earlier for size == 0 in _mesa_clear_buffer_sub_dataNicolai Hähnle2016-02-031-8/+8
| | | | | | | | | Note that the conversion of the clear data (when data != NULL) can fail due to an out of memory condition, but it does not check any error conditions mandated by the spec. Therefore, it is safe to skip when size == 0. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa/main: add USAGE_PIXEL_PACK_BUFFER flag to buffer UsageHistoryNicolai Hähnle2016-02-032-0/+10
| | | | | | | | We will want to disable minmax index caching for buffers that are used in this way. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa/main: add USAGE_TRANSFORM_FEEDBACK_BUFFER flag to buffer UsageHistoryNicolai Hähnle2016-02-032-0/+4
| | | | | | | | We will want to disable minmax index caching for buffers that are used in this way. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* util/hash_table: add _mesa_hash_table_num_entriesNicolai Hähnle2016-02-031-3/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* i965/gen8: Initialize aux_mode to GEN8_SURFACE_AUX_MODE_NONEJordan Justen2016-02-021-2/+2
| | | | | | | | | | | | | | | GEN8_SURFACE_AUX_MODE_NONE is 0, so this is a no-op. Yet, this also makes it clear that we can compare aux_mode to the other GEN8_SURFACE_AUX_MODE_ values. We will want to compare to GEN8_SURFACE_AUX_MODE_HIZ. v2: Some very minor cherry-pick conflicts due to moving it around in the series. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]> Signed-off-by: Ben Widawsky <[email protected]>
* mesa: use default geometry's samples when there are no attachmentsIlia Mirkin2016-02-021-1/+1
| | | | | | | | | Whether multisampling is turned on depends, in part, on whether attachments are themselves multisample surfaces. However when there are no attachments, we should rely on the default geometry for this. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: invalidate framebuffer when changing parametersIlia Mirkin2016-02-021-0/+3
| | | | | | | | | | | | | This fixes dEQP-GLES31.functional.fbo.completeness.no_attachments When the width or height are 0, the framebuffer is incomplete. We may also not have been passing the new state down to the driver when the widths/heights/etc changed. Make sure to dirty the state so that the framebuffer state is revalidated at draw time. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: use geometric helper for computing min samplesIlia Mirkin2016-02-021-3/+4
| | | | | | | | | In case we have a draw buffer without attachments, we should be looking at the default number of samples. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* mesa: the _mesa_geometric_* functions require full types from mtypes.hIlia Mirkin2016-02-021-1/+1
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* Revert "i965: Provide sse2 version for rgba8 <-> bgra8 swizzle"Roland Scheidegger2016-02-022-62/+12
| | | | | | | | | | This reverts commit ab30426e335116e29473faaafe8b57ec760516ee. Apparently the memory isn't quite as aligned when this gets called as it should be, causing crashes. (Albeit this looks independent from this code, should crash just as well if ssse3 is enabled when compiling without this patch.) https://bugs.freedesktop.org/show_bug.cgi?id=93962
* i965: Provide sse2 version for rgba8 <-> bgra8 swizzleRoland Scheidegger2016-02-022-12/+62
| | | | | | | | | | | | | The existing code used ssse3, and because it isn't compiled in a separate file compiled with that, it is usually not used (that, of course, could be fixed...), whereas sse2 is always present at least with 64bit builds. This should be pretty much as fast as the pshufb version, albeit those code paths aren't really used on chips without llc in any case. v2: fix andnot argument order, add comments v3: use pshuflw/hw instead of shifts (suggested by Matt Turner), cut comments Reviewed-by: Matt Turner <[email protected]>
* mesa: fix typo in python scriptsRoland Scheidegger2016-02-021-1/+1
| | | | Reviewed-by: Matt Turner <[email protected]>
* st/mesa: treat a write as a read for range purposesIlia Mirkin2016-02-011-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use this logic to detect live ranges and then do plain renaming across the whole codebase. As such, to prevent WaW hazards, we have to treat a write as if it were also a read. For example, the following sequence was observed before this patch: 13: UIF TEMP[6].xxxx :0 14: ADD TEMP[6].x, CONST[6].xxxx, -IN[3].yyyy 15: RCP TEMP[7].x, TEMP[3].xxxx 16: MUL TEMP[3].x, TEMP[6].xxxx, TEMP[7].xxxx 17: ADD TEMP[6].x, CONST[7].xxxx, -IN[3].yyyy 18: RCP TEMP[7].x, TEMP[3].xxxx 19: MUL TEMP[4].x, TEMP[6].xxxx, TEMP[7].xxxx While after this patch it becomes: 13: UIF TEMP[7].xxxx :0 14: ADD TEMP[7].x, CONST[6].xxxx, -IN[3].yyyy 15: RCP TEMP[8].x, TEMP[3].xxxx 16: MUL TEMP[4].x, TEMP[7].xxxx, TEMP[8].xxxx 17: ADD TEMP[7].x, CONST[7].xxxx, -IN[3].yyyy 18: RCP TEMP[8].x, TEMP[3].xxxx 19: MUL TEMP[5].x, TEMP[7].xxxx, TEMP[8].xxxx Most importantly note that in the first example, the second RCP is done on the result of the MUL while in the second, the second RCP should have the same value as the first. Looking at the GLSL source, it is apparent that both of the RCP's should have had the same source. Looking at what's going on, the GLSL looks something like float tmin_8; float tmin_10; tmin_10 = tmin_8; ... lots of code ... tmin_8 = tmpvar_17; ... more code that never looks at tmin_8 ... And so we end up with a last_read somewhere at the beginning, and a first_write somewhere at the bottom. For some reason DCE doesn't remove it, but even if that were fixed, DCE doesn't handle 100% of cases, esp including loops. With the last_read somewhere high up, we overwrite the previously correct (and large) last_read with a low one, and then proceed to decide to merge all kinds of junk onto this temp. Even if that weren't the case, and there were just some writes after the last read, then we might still overwrite a merged value with one of those. As a result, we should treat a write as a last_read for the purpose of determining the live range. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Cc: [email protected]
* i965/gen7+: Use NIR for lowering of pack/unpack opcodes.Matt Turner2016-02-013-19/+29
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/vec4: Implement nir_op_pack_uvec2_to_uint.Matt Turner2016-02-011-0/+18
| | | | | | | And mark nir_op_pack_uvec4_to_uint unreachable, since it's only produced by lowering pack[SU]norm4x8 which the vec4 backend does not need. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Implement support for extract_word.Matt Turner2016-02-015-0/+56
| | | | | | The vec4 backend will lower it. Reviewed-by: Iago Toral Quiroga <[email protected]>
* glsl: Remove 2x16 half-precision pack/unpack opcodes.Matt Turner2016-02-013-9/+0
| | | | | | i965/fs was the only consumer, and we're now doing the lowering in NIR. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Switch from GLSL IR to NIR for un/packHalf2x16 scalarizing.Matt Turner2016-02-013-11/+7
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Make separate nir_options for scalar/vector stages.Matt Turner2016-02-011-28/+33
| | | | | | | We'll want to have different lowering options set for scalar/vector stages. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Move brw_compiler_create() to new brw_compiler.c.Matt Turner2016-02-015-133/+161
| | | | | | | A future patch will want to use designated initalizers, which aren't available in C++, but this is C. Reviewed-by: Iago Toral Quiroga <[email protected]>
* mesa: enable enums for OES_geometry_shaderMarta Lofstedt2016-02-012-36/+98
| | | | | | | | | | | | | Enable GL_OES_geometry_shader enums for OpenGL ES 3.1. V4: EXTRA tokens updated according to comments from Ilia Mirkin. V5: Account for check_extra does not evaluate "or" lazy. Fix issues with EXTRA_EXT_FB_NO_ATTACH_CS. Signed-off-by: Marta Lofstedt <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* st/mesa: enable ARB_shader_storage_buffer_object when supportedIlia Mirkin2016-01-291-0/+1
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: add shader buffer barrier bitIlia Mirkin2016-01-291-0/+4
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: add support for memory barrier intrinsicsIlia Mirkin2016-01-291-0/+45
| | | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (v2) v1 -> v2: use TGSI_MEMBAR defines
* st/mesa: use RESQ to find buffer sizeIlia Mirkin2016-01-291-4/+18
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* st/mesa: add support for SSBO binding and GLSL intrinsicsIlia Mirkin2016-01-299-8/+397
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> v1 -> v2: some 80 char reformatting
* st/mesa: add atomic counter supportIlia Mirkin2016-01-2910-8/+330
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: add PROGRAM_IMMEDIATE, PROGRAM_BUFFERIlia Mirkin2016-01-292-1/+2
| | | | | | | | | This makes PROGRAM_IMMEDIATE a first-class gl_register_file type, and adds PROGRAM_BUFFER to the list. These are used purely inside glsl_to_tgsi conversion. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965/skl: Utilize new 5th bit for gateway messagesBen Widawsky2016-01-271-2/+4
| | | | | | | | Modify comment as spotted by Matt, and Chris Forbes Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* glsl: add GL_OES_geometry_point_size and conditionalize gl_PointSizeIlia Mirkin2016-01-261-0/+1
| | | | | | | | | | | For now this will be enabled in tandem with GL_OES_geometry_shader. Should a driver come along that wants to separate them out, another enable can be added. Also adds the missed GL_OES_geometry_shader define in glcpp. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marta Lofstedt <[email protected]>
* glsl: move to compiler/Emil Velikov2016-01-2631-62/+59
| | | | | | Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]> Acked-by: Jose Fonseca <[email protected]>
* nir: move to compiler/Emil Velikov2016-01-2613-18/+16
| | | | | | Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]> Acked-by: Jose Fonseca <[email protected]>
* nir: move glsl_types.{cpp,h} to compilerEmil Velikov2016-01-2612-12/+11
| | | | | | | | Allows us to remove the SCons workaround :-) Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]> Acked-by: Jose Fonseca <[email protected]>
* nir: move shader_enums.[ch] to compilerEmil Velikov2016-01-262-1/+2
| | | | | | | | | This way one can reuse it in glsl, nir or other infrastructure without pulling nir as dependency. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]> Acked-by: Jose Fonseca <[email protected]>
* i965/bxt: Fix conservative wm thread counts.Ben Widawsky2016-01-251-1/+1
| | | | | | | | | | | | | | | | | | | When setting the conservative thread counts, I halved everything. That isn't correct for the wm, which has nothing to do with actual thread counts. I suck. BXT only has 1 slice, and there is some ambiguity about subslices, so just reserve the max possible for now. It looks like this might fix: piglit.spec.glsl-1_50.execution.variable-indexing.gs-output-array-vec4-index-wr.bxtm64. I kind of question why that is, but it is what Jenkins says. Mark is current running some of the other blacklisted tests on this patch. (it effects anything requiring scratch space). Cc: mesa-stable <[email protected]> Cc: Neil Roberts <[email protected]> Signed-off-by: Ben Widawsky <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Tested-by: Mark Janes <[email protected]>
* meta: Use internal functions to set texture parametersIan Romanick2016-01-254-24/+49
| | | | | | | | | | | | | | | | | | | | | | _mesa_texture_parameteriv is used because (the more obvious) _mesa_texture_parameteri just stuffs the parameter in an array and calls _mesa_texture_parameteriv. This just cuts out the middleman. As a side bonus we no longer need check that ARB_stencil_texturing is supported. The test doesn't allow non-supporting implementations to avoid any work, and it's redundant with the value-changed test. Fix bug #93717 because the state restore commands at the bottom of _mesa_meta_GenerateMipmap no longer depend on the bound state. Fixes piglit arb_direct_state_access-generatetexturemipmap with the changes recently sent to the piglit mailing list. See the bugzilla entry for more info. Signed-off-by: Ian Romanick <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93717 Cc: "11.0 11.1" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
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