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* ffb: Fix build.Vinson Lee2010-02-101-1/+1
* dri: Fix one last copy-and-paste brain damage from a previous commitIan Romanick2010-02-101-1/+1
* scons: User friendly message for code generated filesJosé Fonseca2010-02-101-2/+2
* r300/compiler: r500-fs: Properly set HW register swizzles.Corbin Simpson2010-02-102-3/+14
* dri: Fix copy-and-paste brain damage in previous commitIan Romanick2010-02-107-9/+9
* intel: Don't expose GLX_SWAP_EXCHANGE_OMLIan Romanick2010-02-101-2/+1
* intel: Expose a minimal number of configs with accumulation bufferIan Romanick2010-02-101-0/+28
* dri: Allow selective generation of accum. buffer configsIan Romanick2010-02-1015-19/+26
* intel: Stop exposing useless 24 depth/0 stencil configsIan Romanick2010-02-101-7/+4
* intel: Remove redundant init of depth_bits / stencil_bits in intelInitScreen2Ian Romanick2010-02-101-9/+0
* intel: Update comment in intelInitScreen2 to noting DRI2 protocol issuesIan Romanick2010-02-101-3/+3
* Add new symbol to exports listunknown2010-02-101-0/+1
* Simplify GLSL extension mechanism.Michal Krol2010-02-101-2/+2
* glsl: GLSL extensions have the GL_ prefixBrian Paul2010-02-101-2/+2
* r600: Fix typo in __DRI_TEXTURE_FORMAT_RGBA renameKristian Høgsberg2010-02-101-1/+1
* radeon: Fix printf formatings to match te values.Pauli Nieminen2010-02-102-2/+2
* radeon: Define EXT_framebuffer_object constants to match hw.Pauli Nieminen2010-02-104-0/+9
* mesa: move all limit/constant assertions into check_context_limits()Brian Paul2010-02-091-30/+30
* dri_interface: Introduce DRI tokens for the texBuffer texture formatsKristian Høgsberg2010-02-095-19/+19
* radeon: Add some debug output for fbo supportPauli Nieminen2010-02-094-0/+80
* r200: Fix UMS notto emit stp.Pauli Nieminen2010-02-091-1/+4
* Merge branch 'gallium-nopointsizeminmax'Roland Scheidegger2010-02-096-16/+126
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| * st/mesa: fix wrong initialization of MaxPointSizeRoland Scheidegger2010-02-081-0/+4
| * gallium: add point_quad_rasterization bit to rasterizer stateRoland Scheidegger2010-02-041-1/+2
| * gallium: add point size clamp to implementation limits in vertex shaderRoland Scheidegger2010-02-045-1/+108
| * gallium: clean up point sprite rasterizer stateRoland Scheidegger2010-02-031-12/+13
| * gallium: remove point_size_min and point_size_max from rasterizer stateRoland Scheidegger2010-01-121-3/+0
* | Retire miniglx and move the actual glx code up to src/glxKristian Høgsberg2010-02-092-11/+11
* | st/mesa: remove special-case cyl-wrap codeBrian Paul2010-02-091-9/+1
* | st/mesa: check for PROG_PARAM_BIT_CYL_WRAP flagBrian Paul2010-02-092-5/+22
* | mesa: add back-door support for cylindrical texture wrap modeBrian Paul2010-02-092-0/+13
* | mesa: Enable true refcounting for NullBufferObj.Michal Krol2010-02-098-10/+48
* | mesa: Protect buffer objects reference counting with a mutex.Michal Krol2010-02-092-4/+7
* | mesa: Ensure object refcount is null when destroying the buffer.José Fonseca2010-02-091-0/+2
* | mesa: Fix null buffer object reference counting.José Fonseca2010-02-092-6/+19
* | mesa: Always do proper ref counting of shared state.José Fonseca2010-02-093-23/+34
* | radeon: fix UMS since stp addition.Dave Airlie2010-02-081-1/+2
* | mesa: Fix mesa_next_pow_two to return same value if parameter is pow2.Pauli Nieminen2010-02-071-3/+5
* | r200: Fix LOD min/max emit.Pauli Nieminen2010-02-072-7/+30
* | r100/r200/r300/r600: Set MaxCombinedTextureImageunits.Pauli Nieminen2010-02-074-0/+11
* | r200: Fix lod bias correction.Pauli Nieminen2010-02-073-4/+7
* | r200: Add some debug output to texture function.Pauli Nieminen2010-02-061-15/+30
* | r300: Fix emit size prediction to know about primitive splitting.Pauli Nieminen2010-02-061-2/+12
* | radeon: Add some debug output to texture function.\nPauli Nieminen2010-02-061-26/+84
* | radeon: Use _mesa_next_pow_two_32 instead of own implementation.Pauli Nieminen2010-02-061-14/+1
* | mesa/main: Add function to find next higher power of two.Pauli Nieminen2010-02-061-0/+46
* | radeon: Add some debug output to miptree code.Pauli Nieminen2010-02-061-23/+62
* | radeon: Remove the loop from stride size calculation.Pauli Nieminen2010-02-061-8/+14
* | intel: Allow L8 PBO blit uploads.Damien Lespiau2010-02-061-0/+5
* | i965: Keep the CURBE BO mapped and memcpy instead of subdataing.Eric Anholt2010-02-063-11/+13