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* i965/fs: Fix can_propagate_from() source/destination overlap check.Francisco Jerez2016-09-141-2/+2
* i965/fs: Compare full register offsets in cmod propagation pass.Francisco Jerez2016-09-141-2/+1
* i965/fs: Don't consider LOAD_PAYLOAD with stride > 1 source to behave like a ...Francisco Jerez2016-09-141-1/+1
* i965/fs: Don't consider LOAD_PAYLOAD with sub-GRF offset to behave like a raw...Francisco Jerez2016-09-141-1/+1
* i965/vec4: Take into account misalignment in regs_written() and regs_read().Francisco Jerez2016-09-141-4/+6
* i965/fs: Take into account misalignment in regs_written() and regs_read().Francisco Jerez2016-09-142-29/+5
* i965/fs: Take into account trailing padding in regs_written() and regs_read().Francisco Jerez2016-09-141-2/+20
* i965/fs: Handle fixed HW GRF subnr in reg_offset().Francisco Jerez2016-09-141-1/+2
* i965/fs: Handle arbitrary offsets in brw_reg_from_fs_reg for MRF/VGRF registers.Francisco Jerez2016-09-141-3/+2
* i965/fs: Return more accurate read size for LINTERP from fs_inst::size_read.Francisco Jerez2016-09-141-1/+1
* i965/fs: Return more accurate read size from fs_inst::size_read for IMM and U...Francisco Jerez2016-09-141-1/+1
* i965/vec4: Replace vec4_instruction::regs_read with ::size_read using byte un...Francisco Jerez2016-09-143-13/+25
* i965/fs: Replace fs_inst::regs_read with ::size_read using byte units.Francisco Jerez2016-09-143-32/+34
* i965/ir: Drop backend_instruction::regs_written field.Francisco Jerez2016-09-141-1/+0
* i965/vec4: Replace vec4_instruction::regs_written with ::size_written field i...Francisco Jerez2016-09-149-11/+12
* i965/fs: Replace fs_inst::regs_written with ::size_written field in bytes.Francisco Jerez2016-09-1415-98/+107
* i965/vec4: Add wrapper functions for vec4_instruction::regs_read and ::regs_w...Francisco Jerez2016-09-146-16/+42
* i965/fs: Add wrapper functions for fs_inst::regs_read and ::regs_written.Francisco Jerez2016-09-149-57/+83
* i965/fs: Replace fs_reg::subreg_offset with fs_reg::offset expressed in bytes.Francisco Jerez2016-09-146-51/+34
* i965/ir: Remove backend_reg::reg_offset.Francisco Jerez2016-09-142-15/+2
* i965/vec4: Replace dst/src_reg::reg_offset with dst/src_reg::offset expressed...Francisco Jerez2016-09-148-48/+51
* i965/fs: Replace fs_reg::reg_offset with fs_reg::offset expressed in bytes.Francisco Jerez2016-09-1417-82/+94
* i965: Enable ANDROID_extension_pack_es31a on Gen9+.Kenneth Graunke2016-09-141-0/+1
* nir: Report progress from nir_lower_phis_to_scalar.Kenneth Graunke2016-09-141-1/+1
* nir: Report progress from nir_lower_alu_to_scalar.Kenneth Graunke2016-09-141-1/+1
* glsl: add core plumbing for GL_ANDROID_extension_pack_es31aIlia Mirkin2016-09-132-0/+3
* mesa: introduce glPrimitiveBoundingBoxARB entrypointIlia Mirkin2016-09-131-0/+3
* mesa: add a GLES3.2 enums section, and expose new MS line width paramsIlia Mirkin2016-09-134-10/+46
* intel/blorp: Rework alloc_binding_tableJason Ekstrand2016-09-131-5/+6
* i965: Use blorp_copy for all copy_image operations on gen6+Jason Ekstrand2016-09-121-22/+6
* i965/blorp: Add a copy_miptrees helperJason Ekstrand2016-09-122-0/+79
* intel/blorp: Work in terms of logical array layersJason Ekstrand2016-09-121-4/+27
* intel/blorp: Add a swizzle parameter to blorp_clearJason Ekstrand2016-09-121-2/+4
* intel/blorp: Take a destination swizzle in blorp_blitJason Ekstrand2016-09-121-0/+1
* intel/blorp: Take an isl_swizzle instead of a SWIZZLEJason Ekstrand2016-09-121-1/+27
* intel/isl: Add an isl_swizzle structure and use it for isl_view swizzlesJason Ekstrand2016-09-121-23/+8
* st/mesa: fix is_scissor_enabled when X/Y are negativeIlia Mirkin2016-09-121-4/+6
* Revert "i965: Drop the maximum 3D texture size to 512 on Sandy Bridge"Jason Ekstrand2016-09-121-10/+1
* mesa: Enable OES/EXT_tessellation_shader for ES 3.1 + ARB_tess drivers.Kenneth Graunke2016-09-121-4/+4
* i965: check for GL_TEXTURE_EXTERNAL_OES at miptree_create_for_teximageAlejandro Piñeiro2016-09-121-0/+1
* i965/rbc: Clarify rational given for shader image resolvesTopi Pohjolainen2016-09-121-3/+4
* i965/blorp: Use hw generetad primitive copies for layered clearsTopi Pohjolainen2016-09-121-24/+12
* i965/blorp: Sanity check all layers before actual clearTopi Pohjolainen2016-09-121-2/+5
* intel/blorp: Add plumbing for setting color clear layer countTopi Pohjolainen2016-09-121-3/+3
* i965/rbc: Allocate mcs directlyTopi Pohjolainen2016-09-124-63/+26
* i965: Add sanity check for non-compressible texture viewsTopi Pohjolainen2016-09-121-0/+34
* i965/rbc: Consult rb settings for texture surface setupTopi Pohjolainen2016-09-121-7/+60
* i965: Track non-compressible sampling of renderbuffersTopi Pohjolainen2016-09-123-2/+52
* i965: Replace boolean rb surface state setup argument with flagsTopi Pohjolainen2016-09-123-12/+20
* i965/rbc: Allow integer formats as advertised in isl_format.cTopi Pohjolainen2016-09-121-2/+1
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