summaryrefslogtreecommitdiffstats
path: root/src/mesa
Commit message (Expand)AuthorAgeFilesLines
...
* intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.Eric Anholt2010-06-0844-272/+277
* intel: Clean up stale comments in intel_batchbuffer.c.Eric Anholt2010-06-081-4/+1
* intel: Remove the non-gem paths for batchbuffer upload.Eric Anholt2010-06-081-22/+4
* intel: Update comment in intel_tex_copy from before miptree x/y rework.Eric Anholt2010-06-081-1/+1
* r600: Make next_inst() static.Henri Verbeet2010-06-082-59/+61
* r600: Assert output registers have a valid export index.Henri Verbeet2010-06-081-0/+4
* r600: Process exports for all written fragment outputs.Henri Verbeet2010-06-081-26/+12
* r600: Fill uiFP_OutputMap for all written fragment outputs.Henri Verbeet2010-06-081-16/+17
* st/mesa: attempt to fix TFP by using sampler views (v1)Dave Airlie2010-06-085-10/+63
* st/mesa: advertise GL_ARB_fragment_program_shadowMarek Olšák2010-06-061-0/+1
* st/mesa: trivially enable GL_ATI_texture_env_combine3Marek Olšák2010-06-051-0/+2
* mesa: add ARB_texture_swizzle as alias of EXT_texture_swizzle, update relnotesMarek Olšák2010-06-051-0/+1
* r300compiler: fix scons buildJoakim Sindholt2010-06-051-0/+2
* st/mesa: fix bug in depthstencil optimizing clear logicRoland Scheidegger2010-06-051-1/+2
* i915: Only emit a MI_FLUSH when the drawing rectangle offset changes.Chris Wilson2010-06-052-8/+24
* i915: Fix off-by-one for drawing rectangle.Chris Wilson2010-06-051-2/+2
* i915: Inhibit render cache flush when changing drawing rectangle offset.Chris Wilson2010-06-051-1/+1
* mesa/st: add support for EXT_texture_swizzle.Dave Airlie2010-06-052-2/+59
* r300/compiler: implement SIN+COS+SCS for vertex shadersMarek Olšák2010-06-053-21/+76
* r300/compiler: implement SNE unwound for r3xx VS, natively for r5xx VSMarek Olšák2010-06-052-1/+37
* r300/compiler: implement SEQ unwound for r3xx VS, natively for r5xx VSMarek Olšák2010-06-052-0/+36
* r300/compiler: implement SFL for vertex shadersMarek Olšák2010-06-051-2/+3
* vbo: misc clean-upsBrian Paul2010-06-041-29/+36
* i915: Don't use XRGB8888 on 830 and 845.Eric Anholt2010-06-043-2/+18
* i915: Clamp minimum lod to maximum texture level too.Eric Anholt2010-06-041-1/+3
* intel: Fix intel_compressed_num_bytes for FXT1 after I broke it.Eric Anholt2010-06-041-1/+1
* Merge branch 'gallium-newclear'Roland Scheidegger2010-06-032-14/+32
|\
| * st/mesa: use new ability to clear only depth or stencilRoland Scheidegger2010-05-292-14/+32
* | gallium: silence all debug_named_value related warningsJoakim Sindholt2010-06-031-9/+9
* | r300/compiler: print opcode names instead of numbersMarek Olšák2010-06-033-8/+8
* | dri/swrast: Remove unnecessary header.Vinson Lee2010-06-021-1/+0
* | st/mesa: fix indirect addressing of input/output regsBrian Paul2010-06-021-4/+9
* | intel: Remove a leftover DRI1/DRI2 conditionalKristian Høgsberg2010-06-021-7/+2
* | glsl: handle indirectly indexed input registers in linkerBrian Paul2010-06-021-29/+108
* | mesa: use BITFIELD64_BIT() macroBrian Paul2010-06-021-1/+1
* | glsl: fix bad sanity-check assertionBrian Paul2010-06-021-1/+1
* | mesa: whitespace and 80 column wrappingBrian Paul2010-06-021-3/+12
* | shaders: Don't lose the param binding swizzle for single params.Eric Anholt2010-06-022-2/+2
* | intel: Fallback to meta if we're asked to CopyTexImage2D from RGB to RGBAKristian Høgsberg2010-06-011-0/+8
* | mesa: use split_location_offset() in GetUniform() functionsBrian Paul2010-06-011-47/+54
* | mesa: Fix excess initializers in get.c table.Chia-I Wu2010-05-311-2/+2
* | swrast: add TFP support to swrast.Dave Airlie2010-05-311-0/+69
* | gallium: fix TFP on galliumDave Airlie2010-05-311-0/+1
* | intel: Initialize batch->reserved_space on allocationChris Wilson2010-05-311-2/+1
* | Always define int32_t in compiler headers.Chia-I Wu2010-05-311-3/+1
* | Update OpenGL ES headers.Chia-I Wu2010-05-312-5/+2
* | mesa: Fix/add feature test to shader.c.Chia-I Wu2010-05-311-1/+3
* | vbo: Remove unnecessary header.Vinson Lee2010-05-301-1/+0
* | r300: fix blits for textures of width/height greater than 2048 on r5xxMarek Olšák2010-05-291-5/+9
* | i965: Add cache unit -> bo name mapping for more gen6 state objects.Eric Anholt2010-05-281-0/+3