summaryrefslogtreecommitdiffstats
path: root/src/mesa
Commit message (Collapse)AuthorAgeFilesLines
* Keep a local copy of the symbol name in the symbol tableIan Romanick2010-08-021-3/+4
| | | | | | | | | | | | | | | | | | | | | The symbol_header structure that tracks symbols with a particular name may have a different (longer) life time than the symbols it tracks. Not keeping a local copy of the name can lead to use-after-free errors. For example, the following sequence would trigger such an error: char *copy = strdup(name); _mesa_symbol_table_push_scope(st); _mesa_symbol_table_add_symbol(st, 0, name, NULL); _mesa_symbol_table_pop_scope(st); free(name); _mesa_symbol_table_find_symbol(st, 0, copy); With this change, the symbol table keeps a local copy of the name that has the same life time as the symbol_header for that name. This resolves some use-after-free errors with built-in functions in the GLSL compiler.
* ir_to_mesa: Add support for MESA_GLSL=log.Eric Anholt2010-08-011-0/+4
| | | | | This is the option that dumps shader source to files in the current directory.
* glsl2: Add new tree grafting optimization pass.Eric Anholt2010-07-311-0/+1
|
* ir_to_mesa: Add the function name as a comment to BGNSUB and ENDSUB.Eric Anholt2010-07-301-4/+18
|
* ir_to_mesa: Don't emit a duplicate return at the end of a function.Eric Anholt2010-07-291-2/+6
| | | | It was harmless, but ugly.
* ir_to_mesa: Respect the driver if it rejects a shader.Eric Anholt2010-07-282-9/+11
|
* glsl2: Add support for redeclaring layout of gl_FragCoord for ARB_fcc.Eric Anholt2010-07-281-1/+6
| | | | | Fixes: glsl-arb-fragment-coord-conventions
* ir_to_mesa: Add remaining state variable (builtin uniforms) support.Eric Anholt2010-07-281-0/+201
| | | | | | | | | | Fixes: glsl1-GL state variable reference (diffuse product) glsl1-GL state variable reference (gl_FrontMaterial.ambient) glsl1-GL state variable reference (gl_LightSource[0].diffuse) glsl1-GL state variable reference (point attenuation) glsl1-GL state variable reference (point size) glsl1-linear fog
* ir_to_mesa: Provide a restricted type size to _mesa_add_uniform.Eric Anholt2010-07-271-1/+10
| | | | | Fixes: glsl-uniform-out-of-bounds.
* ir_to_mesa: Add support for array constants.Eric Anholt2010-07-271-17/+31
| | | | | | | | | Fixes: glsl1-GLSL 1.20 array constructor 1 glsl1-GLSL 1.20 array constructor 2 glsl1-GLSL 1.20 array.length() glsl1-GLSL 1.20 const array constructor 1 glsl1-GLSL 1.20 const array constructor 2
* glsl2: Make the dead code handler make its own talloc context.Eric Anholt2010-07-271-1/+1
| | | | | This way, we don't need to pass in a parse state, and the context doesn't grow with the number of passes through optimization.
* mesa: Allow large temporary indices coming into the temporary reg allocator.Eric Anholt2010-07-271-21/+27
| | | | | This gets glsl-vs-raytrace, glsl-fs-raytrace running on the new compiler.
* ir_to_mesa: Set the swizzle on constant struct src regs.Eric Anholt2010-07-271-0/+1
| | | | MESA_GLSL=nopt now produces believable output for glsl-fs-raytrace.
* ir_to_mesa: Fix stray "break" that broke functions of >1 argument.Eric Anholt2010-07-271-1/+0
|
* glsl2: Add optimization pass for algebraic simplifications.Eric Anholt2010-07-271-0/+1
| | | | | | This cleans up the assembly output of almost all the non-logic tests glsl-algebraic-*. glsl-algebraic-pow-two needs love (basically, flattening to a temporary and squaring it).
* ir_to_mesa: Fix up handling of void function returns.Eric Anholt2010-07-261-1/+1
| | | | void functions have a type of glsl_type::void_type, not a null type.
* ir_to_mesa: Actually allocate the right size for constant matrix temps.Eric Anholt2010-07-261-1/+1
|
* ir_to_mesa: Add support for structure constants.Eric Anholt2010-07-261-5/+30
| | | | | Fixes: TPPStreamCompiler::assignOperands
* Merge remote branch 'origin/master' into glsl2Eric Anholt2010-07-26296-7800/+12406
|\ | | | | | | | | | | | | | | | | | | | | This pulls in multiple i965 driver fixes which will help ensure better testing coverage during development, and also gets past the conflicts of the src/mesa/shader -> src/mesa/program move. Conflicts: src/mesa/Makefile src/mesa/main/shaderapi.c src/mesa/main/shaderobj.h
| * i965: Fix reversed naming of the operations in compute-to-mrf optimization.Eric Anholt2010-07-263-6/+11
| | | | | | | | | | Also fix up comments, so that the difference between the two passes is clarified.
| * i965: Clean up a few magic numbers to use brw_defines.h defs.Eric Anholt2010-07-263-18/+20
| |
| * i965: Use MIN2, MAX2 instead of rolling our own.Eric Anholt2010-07-261-15/+12
| |
| * i965: Fold the "is arithmetic" bit of 965 opcodes into the opcode list.Eric Anholt2010-07-261-50/+26
| |
| * i965: Remove some duped register size/count definitionsEric Anholt2010-07-262-34/+26
| |
| * i965: Move the GRF-to-MRF optimizations to brw_optimize.c.Eric Anholt2010-07-263-619/+618
| |
| * i965: Improve (i.e. remove) some grf-to-mrf unnecessary movesBenjamin Segovia2010-07-261-2/+626
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several routines directly analyze the grf-to-mrf moves from the Gen binary code. When it is possible, the mov is removed and the message register is directly written in the arithmetic instruction Also redundant mrf-to-grf moves are removed (frequently for example, when sampling many textures with the same uv) Code was tested with piglit, warsow and nexuiz on an Ironlake machine. No regression was found there Note that the optimizations are *deactivated* on Gen4 and Gen6 since I did test them properly yet. No reason there are bugs but who knows The optimizations are currently done in branch free programs *only*. Considering branches is more complicated and there are actually two paths: one for branch free programs and one for programs with branches Also some other optimizations should be done during the emission itself but considering that some code is shader between vertex shaders (AOS) and pixel shaders (SOA) and that we may have branches or not, it is pretty hard to both factorize the code and have one good set of strategies
| * i965: Allow VS MOVs to use immediate constants.Eric Anholt2010-07-261-0/+1
| | | | | | | | | | Clarifies program assembly, and with a little tweak to always use constant_map, we could cut down on constant buffer payload.
| * mesa: Fix Cygwin build with llvm enabled.Vinson Lee2010-07-231-1/+1
| | | | | | | | | | On Cygwin locale_t in not available but 'llvm-config --cppflags' adds the compiler flag -D_GNU_SOURCE to the build.
| * gallium: Fix build with llvm installed in non-standard locationChristopher James Halse Rogers2010-07-231-0/+7
| | | | | | | | | | | | | | | | | | | | The es1, es2 and gl state trackers include draw_pipe.h, which includes the llvm headers if MESA_LLVM is true, so we also need to add the llvm seachpaths. Similarly, gallivm and other gallium drivers need LLVM_CFLAGS to build when enabled. Also fix xorg drivers, they didn't include LDFLAGS.
| * st/mesa: get rid of unneeded ureg_writemask()Brian Paul2010-07-231-3/+2
| |
| * st/mesa: fix bug in emit_adjusted_wpos()Brian Paul2010-07-231-2/+5
| | | | | | | | | | | | | | | | | | If we bias x,y we still need to pass through z,w in case the shader reads gl_FragCoord.z or .w. Fixes fd.o bug 29183 (piglit glsl-bug-22603). NOTE: This is a candidate for the 7.8 branch.
| * i965: Cleanly fail programs with unsupported array access.Eric Anholt2010-07-231-1/+28
| | | | | | | | | | This should be more useful for developers and for bug triaging than just generating wrong code.
| * i965: Add support for VS relative addressing of temporary arrays.Eric Anholt2010-07-231-2/+49
| | | | | | | | Fixes glsl-vs-arrays. Bug #27388.
| * glsl: remove invalid _mesa_problem() callBrian Paul2010-07-221-0/+2
| | | | | | | | Fixes fd.o bug 29206.
| * i965: Respect VS/VP point size result when enabled.Eric Anholt2010-07-221-3/+4
| | | | | | | | Fixes glsl-vs-point-size.
| * i965: Fix the disasm output for da16 src widths.Eric Anholt2010-07-221-1/+1
| | | | | | | | | | | | This has confused me twice now. It's a fixed width of 4 (usually a region description of <4,4,1>), not 1. If it was 1, we'd have been skipping all over register space.
| * i965: Avoid extra MOV in VS indirect register reads.Eric Anholt2010-07-221-15/+16
| |
| * i965: Fix up VS temporary array access for fixed index offset != 0.Eric Anholt2010-07-221-1/+1
| |
| * r600: Flip point sprite coordinates when rendering to an FBO.Henri Verbeet2010-07-221-1/+3
| | | | | | | | This supersedes http://lists.freedesktop.org/archives/mesa-dev/2010-July/001442.html.
| * i965: In the VS, multiply the address reg by the appropriate register size.Eric Anholt2010-07-211-27/+14
| | | | | | | | | | | | | | | | | | | | | | | | The ARL value is increments of vec4 in the register file. But PROGRAM_TEMPORARY or PROGRAM_INPUT are stored as vec4s interleaved between the two verts being executed (thus a vec8 each), compared to PROGRAM_STATE_VAR being packed vec4s. Fixes: glsl-vs-arrays-2 glsl-vs-mov-after-deref (without regressing glsl-vs-arrays-3)
| * i965: Clean up brw_dp_READ_4_vs() now that it has fewer options to support.Eric Anholt2010-07-213-52/+31
| |
| * i965: Support relative addressed VS constant reads using the appropriate msg.Eric Anholt2010-07-213-31/+66
| | | | | | | | | | The previous support was overly complicated by trying to use the same 1-OWORD message for both offsets.
| * i965: Fix the DP read msg_control definitions other than plain OWORD.Eric Anholt2010-07-211-6/+16
| |
| * i965: Clean up dead code from the VS get_constant/get_reladdr_constant split.Eric Anholt2010-07-211-3/+1
| |
| * i956: Set the execution size correctly for scratch space writes.Eric Anholt2010-07-211-2/+2
| | | | | | | | | | | | | | | | Otherwise, the second half isn't written, and we end up reading back black. Fixes the remaining junk drawn in glsl-max-varyings, and will likely help with a number of large real-world shaders.
| * i965: Set the GEM domain flags for the scratch space.Eric Anholt2010-07-211-1/+1
| | | | | | | | | | | | They go into the render cache, so while we don't care about their contents after execution, failing to note them could cause the writes to be flushed over important buffer contents later.
| * i965: Use the pretty define for 4-oword DP reads.Eric Anholt2010-07-211-1/+1
| |
| * i965: Set the send commit bit on register spills as required pre-gen6.Eric Anholt2010-07-211-9/+32
| | | | | | | | Otherwise, the subsequent read may not get the written value.
| * i965: Add disasm for dataport reads (register unspilling).Eric Anholt2010-07-211-1/+22
| |
| * st/mesa: implement depth clampMarek Olšák2010-07-212-0/+6
| |
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 08:14:28 +0000