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* intel/blorp: Pass a brw_stage_prog_data to upload_shaderJason Ekstrand2016-11-021-1/+2
| | | | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012 Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Cc: "13.0" <[email protected]>
* i965/gen8: Fix vertex attrib upload for dvec3/4 shader inputsAntia Puentes2016-11-015-22/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The emission of vertex attributes corresponding to dvec3 and dvec4 vertex shader input variables was not correct when the <size> passed to the VertexAttribL* commands was <= 2. This was because we were using the vertex array size when emitting vertices to decide if we uploaded a 64-bit floating point attribute as 1 slot (128-bits) for sizes 1 and 2, or 2 slots (256-bits) for sizes 3 and 4. This caused problems when mapping the input variables to registers because, for deciding which registers contain the values uploaded for a certain variable, we use the size and type given to the variable in the shader, so we will be assigning 256-bits to dvec3/4 variables, even if we only uploaded 128-bits for them, which happened when the vertex array size was <= 2. The patch uses the shader information to only emit as 128-bits those 64-bit floating point variables that were declared as double or dvec2 in the vertex shader. Dvec3 and dvec4 variables will be always uploaded as 256-bits, independently of the <size> given to the VertexAttribL* command. From the ARB_vertex_attrib_64bit specification: "For the 64-bit double precision types listed in Table X.1, no default attribute values are provided if the values of the vertex attribute variable are specified with fewer components than required for the attribute variable. For example, the fourth component of a variable of type dvec4 will be undefined if specified using VertexAttribL3dv or using a vertex array specified with VertexAttribLPointer and a size of three." We are filling these unspecified components with zeros, which coincidentally is also what the GL44-CTS.vertex_attrib_binding.basic-inputL-case1 expects. v2: Do not use bitcount (Kenneth Graunke) Fixes: GL44-CTS.vertex_attrib_binding.basic-inputL-case1 test Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97287 Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Move gen8_disable_stages to brw_upload_initial_gpu_stateNanley Chery2016-10-314-56/+13
| | | | | | | | | | 3DSTATE_WM_CHROMAKEY isn't programmed anywhere else. 3DSTATE_WM_HZ_OP is programmed, then cleared by blorp during a HZ op, so repeatedly clearing it after every blorp execution is redundant. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Program 3DSTATE_AA_LINE_PARAMETERS in upload_invariant_stateNanley Chery2016-10-313-36/+10
| | | | | | | This packet is non-pipelined and doesn't ever change across emissions. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* ralloc: use rzalloc where it's necessaryMarek Olšák2016-10-311-2/+3
| | | | | | | | | | | | | | | | | No change in behavior. ralloc_size is equivalent to rzalloc_size. That will change though. Calls not switched to rzalloc_size: - ralloc_vasprintf - glsl_type::name allocation (it's filled with snprintf) - C++ classes where valgrind didn't show uninitialized values I switched most of non-glsl stuff to rzalloc without checking whether it's really needed. Reviewed-by: Edward O'Callaghan <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* i965/fs: fill allocated memory with zeros where neededJuha-Pekka Heikkila2016-10-312-3/+3
| | | | Signed-off-by: Marek Olšák <[email protected]>
* i965/vec4: zero allocated memory where neededJuha-Pekka Heikkila2016-10-311-2/+2
| | | | | Signed-off-by: Juha-Pekka Heikkila <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* i965/fs/generator: Don't use the address immediate for MOV_INDIRECTJason Ekstrand2016-10-281-28/+27
| | | | | | | | | | | | | The address immediate field is only 9 bits and, since the value is in bytes, the highest GRF we can point to with it is g15. This makes it pretty close to useless for MOV_INDIRECT. There were already piles of restrictions preventing us from using it prior to Broadwell, so let's get rid of the gen8+ code path entirely. Signed-off-by: Jason Ekstrand <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97779 Cc: "12.0 13.0" <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Fix make check after 66fcfa6894ab6Jason Ekstrand2016-10-281-2/+2
| | | | | | | | Commit 66fcfa6894ab6 changed the vec4 version of offset() to have 3 parameters instead of 2 but the vec4_cmod_propagation test was never updated. Signed-off-by: Jason Ekstrand <[email protected]>
* mesa: rename gl_client_array -> gl_vertex_arrayBrian Paul2016-10-2831-112/+114
| | | | | | | | | | | The term "client array" is a legacy thing dating back to the pre-VBO era when _all_ vertex arrays lived in client memory. Nowadays, it only contains vertex array state which is derived from gl_array_attributes and gl_vertex_buffer_binding. It's used by the VBO module and some drivers. Reviewed-by: Anuj Phogat <[email protected]>
* mesa: code clean-up in _mesa_update_vao_client_arrays()Brian Paul2016-10-281-8/+5
| | | | | | Init vars where declared, use const qualifiers. Reviewed-by: Anuj Phogat <[email protected]>
* mesa: update comment on vertex_attrib_binding()Brian Paul2016-10-281-1/+2
| | | | | | Was missed in an earlier renaming patch. Reviewed-by: Anuj Phogat <[email protected]>
* mesa: rename gl_vertex_array_object::VertexBinding to BufferBindingBrian Paul2016-10-289-54/+54
| | | | | | To be a little more understandable. Reviewed-by: Anuj Phogat <[email protected]>
* i965: use memory context when creating passthrough tcsTimothy Arceri2016-10-281-8/+5
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* drivers/meta: Accept GL_TEXTURE_3D as target for tex image decompressionEduardo Lima Mitev2016-10-281-4/+0
| | | | | | | | | | | | | | | | | | An assert is currently raised, preventing decompression of a texture image into a GL_TEXTURE_3D target. I have not found any spec wording that would explain this, or implementation detail that would prevent it. And in any case, the driver should not cause a crash upon user input arguments. Fixes most failing subcases in CTS tests: * GL44-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels_pixelstore * GL45-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels_pixelstore These tests were crashing the driver before. Now they just fail, but due to an unrelated issue affecting 2 out of the 45 test subcases. No regressions observed against piglit or CTS-GL. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/miptree: Remove the width/height < 32768 restrictionsJason Ekstrand2016-10-272-8/+1
| | | | | | | | | | | | These restrictions existed because intel_miptree_blit couldn't handle surfaces bigger than 32k. How that we're chopping blits up into chunks, it can handle any size we throw at it so we can get rid of this restriction. This improves the terrain tests in synmark by 25-30% on my Sky Lake gt3. Signed-off-by: Jason Ekstrand <[email protected]> Reported-by: Ben Widawsky <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/blit: Break blits into chunks in intel_miptree_blitJason Ekstrand2016-10-271-23/+41
| | | | | | | | | | | | | | This allows us to blit much larger images than if we use the blitter directly. In particular, it gives us an almost infinite image height compared to the fairly limiting 32k. We do, however, still have a restriction on stride of the image because handling larger strides, while possible, is fairly difficult. v2: Properly handle linear blit alignment restrictions Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/blit: Break blits into chunks in set_alpha_to_oneJason Ekstrand2016-10-271-15/+73
| | | | | | | | v2: Properly handle linear blit alignment restrictions Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/blit: Remove a bogus assertionJason Ekstrand2016-10-271-4/+0
| | | | | | | | | | | | This assertion, while valid for linear buffers, doesn't work properly for tiled memory. It used to work most of the time because the offset provided was always to the left-hand edge of the image. However, if you use a byte offset to get to the inside of the image, the height * stride calculation may actually end up being too large. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/miptree: Break miptree -> ISL tiling conversion into a helperJason Ekstrand2016-10-272-25/+33
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/miptree: Remove the stencil_as_y_tiled parameter from get_aligned_offsetJason Ekstrand2016-10-275-28/+8
| | | | | | | | | The only actual user of this parameter was blorp and, since the conversion to ISL, it no longer uses this function. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/vec4: make offset() work in terms of a simd width and scalar componentsIago Toral Quiroga2016-10-273-18/+16
| | | | | | | | | | | | | | | So that it has the same semantics as the scalar backend implementation. The helper will now take a simd width (which is always 8 in vec4 mode) and step as many scalar components as specified by that width, respecting the size of the scalar channels. v2 (Curro): - Remove the assertion in offset(), byte_offset() has the same checks. - Use byte_offset() directly instead of add_byte_offset(). - Make things more clear by explicitly including the vertical stride in the byte offset expression. Reviewed-by: Francisco Jerez <[email protected]>
* i965/vec4: use byte_offset() instead of offset()Iago Toral Quiroga2016-10-275-15/+29
| | | | | | | | | | | In a later patch we want to change the semantics of offset() to be in terms of SIMD width and scalar channels so it is consistent with the definition of the same helper in the scalar backend. However, some uses of offset() in the vec4 backend do not operate naturally in terms of these semantics. In these cases it is more natural to use the byte_offset() helper instead. Reviewed-by: Francisco Jerez <[email protected]>
* i965/vec4: add a byte_offset helperIago Toral Quiroga2016-10-271-0/+50
| | | | | | | | v2: wrap the helper in a namespace to make clear that it is an implementation detail of byte_offset() and is not intended to be used independently (Curro). Reviewed-by: Francisco Jerez <[email protected]>
* mesa: expose GL_EXT_robustnessTapani Pälli2016-10-271-0/+1
| | | | | | | | | | | Fixes 8 failing dEQP tests: dEQP-EGL.functional.create_context_ext.robust_gles* (now 42 tests pass in dEQP-EGL*robust*, 0 fail and rest are skipped) Signed-off-by: Tapani Pälli <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98343 Reviewed-by: Eric Engestrom <[email protected]>
* st/mesa: set RobustAccess true when is supportedTapani Pälli2016-10-271-1/+3
| | | | | Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* i956: set RobustAccess true when is supportedTapani Pälli2016-10-271-1/+3
| | | | | Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* mesa: add missing CONTEXT_ROBUST_ACCESS enumTapani Pälli2016-10-274-0/+8
| | | | | | | | commit 85008db1d51f923113832394d7f8d6b1868be882 missed this enum for GL_KHR_robustness implementation Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* st/mesa: allow multiple concurrent waiters in ClientWaitSyncMarek Olšák2016-10-261-4/+22
| | | | | | | | | | so->fence can be unreferenced by one thread while another thread is somewhere in ClientWaitSync and expecting so->fence to be non-NULL. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98172 Cc: 12.0 13.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: unduplicate st_check_sync codeMarek Olšák2016-10-261-20/+6
| | | | | | | | It's the same as st_client_wait_sync. Discovered by Michel. This is needed to make the following fix simpler. Cc: 12.0 13.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa/program: Add _mesa_symbol_table_replace_symbol()Samuel Iglesias Gonsálvez2016-10-262-0/+18
| | | | | | | | | | This function allows to modify an existing symbol. v2: - Remove namespace usage now that it was deleted. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* nir: stop adjusting driver location for varying packingTimothy Arceri2016-10-263-6/+3
| | | | | | | | | | | | As of 59864e8e020 we just use the location assigned by the front-end and no longer need this for i965. Since there were some issues in the logic with assigning arrays the same driver location if they didn't start at the same location just remove it and let other drivers implement a solution if needed when they add ARB_enhanced_layouts support. Reviewed-by: Kenneth Graunke <[email protected]>
* compiler: remove copy_shader_info()Timothy Arceri2016-10-261-2/+0
| | | | | | | This temporary helper is no longer needed now that we have finished refactoring common shader metadata. Reviewed-by: Jason Ekstrand <[email protected]>
* glsl: set uses texture gather directly in shader_infoTimothy Arceri2016-10-261-2/+0
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* glsl/st/mesa: use common system values read fieldTimothy Arceri2016-10-266-8/+6
| | | | | | | | | And set system values read directly in shader_info. st/mesa changes where: Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* glsl: set patch outputs written directly in shader_infoTimothy Arceri2016-10-261-1/+0
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* st/mesa: use common patch outputs written fieldTimothy Arceri2016-10-262-2/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* glsl: set patch inputs read directly in shader_infoTimothy Arceri2016-10-261-1/+0
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* st/mesa: use common patch inputs read fieldTimothy Arceri2016-10-262-2/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* glsl: set outputs read directly in shader_infoTimothy Arceri2016-10-261-1/+0
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* r200/glsl/st/mesa: use common outputs written fieldTimothy Arceri2016-10-2621-39/+45
| | | | | | | | | And set outputs written directly in shader_info. st/mesa changes where: Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* mesa/glsl: set double inputs read directly in shader_infoTimothy Arceri2016-10-261-1/+0
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* st/mesa: use common double inputs read fieldTimothy Arceri2016-10-263-3/+6
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* r200/i915/st/mesa/compiler: use common inputs read fieldTimothy Arceri2016-10-2628-72/+75
| | | | | | | | | | | | And set set inputs_read directly in shader_info. To avoid regressions between changes this change is a squashed version of the following patches. st/mesa changes where: Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* mesa/compiler: copy early fragment tests to shader_info in ↵Timothy Arceri2016-10-261-0/+1
| | | | | | _mesa_copy_linked_program_data() Reviewed-by: Jason Ekstrand <[email protected]>
* meta: remove remaining tabs in meta.cTimothy Arceri2016-10-261-49/+49
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965: replace brw_compute_program with brw_programTimothy Arceri2016-10-264-35/+8
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965: replace brw_fragment_program with brw_programTimothy Arceri2016-10-266-36/+13
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965: replace brw_tess_{eval,ctrl}_program with brw_programTimothy Arceri2016-10-268-74/+18
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965: replace brw_geomerty_program with brw_programTimothy Arceri2016-10-267-37/+10
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
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