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* ir_to_mesa: Remove incorrect usage of the 'struct' keyword on classes.Kenneth Graunke2011-08-191-2/+2
* i965/fs: Change incorrect use of 'struct fs_reg' to simply 'fs_reg'.Kenneth Graunke2011-08-191-1/+1
* i965/vs: Implement proper register allocation instead of 1:1 mapping.Eric Anholt2011-08-192-1/+155
* i965/vs: Add simple dead code elimination.Eric Anholt2011-08-193-0/+38
* i965/vs: Copy the live intervals calculation over from the FS.Eric Anholt2011-08-194-0/+139
* i965/vs: Remove stale comment about compressed instructions.Eric Anholt2011-08-191-1/+0
* mesa: handle array textures in GenerateMipmap(), FramebufferTexture1/2D()Brian Paul2011-08-191-3/+21
* meta: use fallback mipmap generation for 1D/2D texture arraysBrian Paul2011-08-191-2/+5
* mesa: set Q=1 for OPCODE_TEX executionBrian Paul2011-08-191-0/+8
* mesa: restructure error checking in _mesa_FramebufferTexture1D/2DEXT()Brian Paul2011-08-191-11/+45
* mesa: Declare _mesa_meta_begin()/end() as publicChad Versace2011-08-192-142/+147
* mesa: fix incorrect error code in _mesa_FramebufferTexture1D/3DEXT()Brian Paul2011-08-181-2/+2
* glapi: update .gitignore for generated ES dispatch headersPaul Berry2011-08-181-0/+4
* i965/fs: Fix 32-bit integer multiplication.Eric Anholt2011-08-172-1/+22
* st/mesa: fix incorrect loop over instruction src regsBrian Paul2011-08-171-1/+1
* xmlpool.h: fix a typoLauri Kasanen2011-08-171-1/+1
* xmlconfig: Make the error message more informativeLauri Kasanen2011-08-171-1/+1
* mesa: Bump instruction execution limit to 65536Ian Romanick2011-08-161-1/+1
* mesa: Add partial constant propagation pass for Mesa IRIan Romanick2011-08-165-0/+458
* ir_to_mesa: Emit a MAD(b, -a, b) for !a && bIan Romanick2011-08-161-0/+52
* ir_to_mesa: Implement ir_binop_all_equal using DP4 w/SGEIan Romanick2011-08-161-1/+12
* ir_to_mesa: Implement ir_binop_any_nequal using DP4 w/saturate or DP4 w/SLTIan Romanick2011-08-161-2/+20
* ir_to_mesa: Implement ir_unop_any using DP4 w/saturate or DP4 w/SLTIan Romanick2011-08-161-4/+23
* ir_to_mesa: Make ir_to_mesa_visitor::emit_dp return the instructionIan Romanick2011-08-161-7/+7
* ir_to_mesa: Implement ir_binop_logic_or using an add w/saturate or add w/SLTIan Romanick2011-08-161-4/+21
* ir_to_mesa: Implement ir_unop_logic_not using 1-xIan Romanick2011-08-161-1/+7
* mesa: Add Android to list of platforms that define fpclassify()Chad Versace2011-08-161-1/+1
* mesa: Fix Android build by #ifdef'ing out locale supportChad Versace2011-08-161-1/+2
* mesa: Remove use of fpu_control.hChad Versace2011-08-162-14/+0
* i965/vs: Fix multiplies to actually do 32-bit multiplies.Eric Anholt2011-08-162-1/+22
* i965/vs: Add support for conversion of FIXED_HW_REG src_reg to/from dst_reg.Eric Anholt2011-08-161-0/+2
* i965/vs: Fix memory leak of ralloc context for the visitor.Eric Anholt2011-08-161-0/+1
* i965/vs: Fix condition code for scalar expression all_equals.Eric Anholt2011-08-161-1/+1
* i965/vs: Don't assertion fail on vertex texturing.Eric Anholt2011-08-161-1/+6
* i965/gen6: Force WHILE exec size to 8.Eric Anholt2011-08-161-4/+2
* i965/vs: Remove remaining use of foreach_iter.Eric Anholt2011-08-162-9/+5
* i965/vs: Fix abs/negate handling on attributes.Eric Anholt2011-08-161-2/+9
* i965/vs: Avoid generating a MOV for most ir_assignment handling.Eric Anholt2011-08-162-0/+73
* i965/vs: Run the shader backend at link time and return compile failures.Eric Anholt2011-08-166-20/+54
* i965: Fix assertion failure on a loop consisting of while (true) { break }.Eric Anholt2011-08-161-1/+1
* i965/vs: Fix the trivial register allocator's failure path.Eric Anholt2011-08-162-3/+5
* i965/vs: Add support for if(any(bvec)) on gen6.Eric Anholt2011-08-161-4/+8
* i965/vs: Add support for GL_FIXED attributes.Eric Anholt2011-08-161-0/+12
* i965/vs: Clamp vertex color outputs when required by ARB_color_buffer_float.Eric Anholt2011-08-161-1/+10
* i965/vs: Fix access of attribute arrays.Eric Anholt2011-08-161-1/+2
* i965/vs: Fix builtin uniform setup.Eric Anholt2011-08-161-3/+2
* i965/vs: Add support for loops.Eric Anholt2011-08-161-32/+21
* i965/vs: Add support for ir_binop_pow.Eric Anholt2011-08-163-7/+70
* i965/vs: Respect the gen6 limitation that math opcodes can't be align16.Eric Anholt2011-08-162-2/+33
* i965/vs: Fix implementation of ir_unop_any.Eric Anholt2011-08-161-1/+3
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