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* nir: rename nir_foreach_block*() to nir_foreach_block*_call()Connor Abbott2016-04-206-10/+10
* i965/vec4: Always split uniforms in array_access_to_pull_constantsJason Ekstrand2016-04-201-1/+3
* i965/vec4: Use the correct offset for the swizzle shift in push constantsJason Ekstrand2016-04-201-1/+1
* i965/vec4: Use nir_intrinsic_base in the load_uniform implementationJason Ekstrand2016-04-201-1/+1
* mesa/st: enable compute shaders if images are also supportedBas Nieuwenhuizen2016-04-191-3/+4
* i965: Define miptree map functions static (trivial)Ben Widawsky2016-04-181-2/+2
* meta: Don't botch color masks when changing drawbuffers.Kenneth Graunke2016-04-181-7/+75
* meta: Don't smash ColorMask when using MESA_META_COLOR_MASK save bit.Kenneth Graunke2016-04-182-5/+4
* i965/fs: Don't allow OOB array access of imagesJason Ekstrand2016-04-151-15/+11
* mesa/texstore: Use Driver.CompressedTexSubImage in the default CompressedTexI...Nanley Chery2016-04-151-5/+5
* i965/vec4: Support full std140 layout for push constantsJason Ekstrand2016-04-151-5/+25
* i965/vec4: Handle MOV_INDIRECT in pack_uniform_registersJason Ekstrand2016-04-151-0/+18
* i965/vec4: Add support for SHADER_OPCODE_MOV_INDIRECTJason Ekstrand2016-04-152-0/+68
* i965/vec4: Use can_do_writemask in can_reswizzleJason Ekstrand2016-04-151-3/+5
* i965/vec4: Move can_do_writemask to vec4_instructionJason Ekstrand2016-04-153-30/+30
* i965/surface_formats: Update some formats for more recent gensJason Ekstrand2016-04-151-12/+12
* xlib: remove MESA_GLX_VISUAL_HACKJohn Sheu2016-04-151-23/+19
* xlib: fix leaks of returned values from XGetVisualInfoJohn Sheu2016-04-151-8/+21
* xlib: fix memory leak of and remove vishandle from XMesaVisualInfoJohn Sheu2016-04-152-39/+24
* xlib: do not cache return value of glXChooseVisual/glXGetVisualFromFBConfigJohn Sheu2016-04-151-18/+8
* i965: Expose the surface format tableJason Ekstrand2016-04-143-18/+48
* dri: Fix robust context creation via EGL attributeChad Versace2016-04-141-2/+23
* i965: Push everything if pull_param == NULLJason Ekstrand2016-04-142-2/+14
* i965/fs: Push small uniform arraysJason Ekstrand2016-04-141-23/+53
* i965/fs: Rename demote_pull_constants to lower_constant_loadsJason Ekstrand2016-04-142-3/+3
* i965/vec4: Get rid of the uniform_size arrayJason Ekstrand2016-04-146-33/+0
* i965/vec4: Use MOV_INDIRECT instead of reladdr for indirect push constantsJason Ekstrand2016-04-144-51/+50
* i965/fs: Get rid of the param_size arrayJason Ekstrand2016-04-144-15/+0
* i965/fs: Stop relying on param_size in assign_constant_locationsJason Ekstrand2016-04-141-27/+17
* i965/fs: Get rid of reladdrJason Ekstrand2016-04-142-10/+2
* i965/fs: Use MOV_INDIRECT for all indirect uniform loadsJason Ekstrand2016-04-142-40/+87
* i965/fs: Add support for MOV_INDIRECT on pre-Broadwell hardwareJason Ekstrand2016-04-142-13/+66
* i965/fs: Fix regs_read() for MOV_INDIRECT with a non-zero subnrJason Ekstrand2016-04-141-1/+1
* i965/fs: Don't force MASK_DISABLE on INDIRECT_MOV instructionsJason Ekstrand2016-04-141-1/+0
* i965/fs: Add support for doing MOV_INDIRECT on uniformsJason Ekstrand2016-04-141-1/+4
* i965: Make intel_get_param return an intBen Widawsky2016-04-141-10/+7
* st/mesa: fix sampler view leak in st_DrawAtlasBitmaps()Brian Paul2016-04-141-0/+6
* i965/vec4: Use UD rather than D for uniform indirectsJason Ekstrand2016-04-142-6/+6
* i965/fs: Use UD type for offsets in VARYING_PULL_CONSTANT_LOADJason Ekstrand2016-04-142-3/+4
* nir/dead_variables: Configurably work with any variable modeJason Ekstrand2016-04-131-1/+1
* i965: Switch to NIR for ldexp lowering.Kenneth Graunke2016-04-132-2/+1
* i965: Implement the new imod and irem opcodesJason Ekstrand2016-04-132-0/+72
* i965/vec4: Inline get_pull_constant_offsetJason Ekstrand2016-04-132-25/+14
* scons: Allow building with Address Sanitizer.Jose Fonseca2016-04-131-2/+6
* mesa: Change an error code in glSamplerParameterI[iu]v().Kenneth Graunke2016-04-121-4/+6
* i965/tiled_memcpy: Fix rgba8_copy_16_aligned_dst() typoKristian Høgsberg Kristensen2016-04-121-4/+4
* i965/tiled_memcpy: Unroll bytes==64 case.Matt Turner2016-04-121-0/+16
* i965/tiled_memcpy: Provide SSE2 for RGBA8 <-> BGRA8 swizzle.Roland Scheidegger2016-04-121-3/+40
* i965/tiled_memcpy: Move SSSE3 code back into inline functions.Matt Turner2016-04-121-18/+24
* i965/tiled_memcpy: Optimize RGBA -> BGRA swizzle.Matt Turner2016-04-121-8/+11
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