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* i965/fs: Add support for compute-to-mrf in 16-wide mode.Eric Anholt2011-04-261-11/+52
| | | | | | | | | This is more painful than instruction scheduling, as we have to compare two MRF writes to see if they coincide, and have to handle partial GRF writes before that (for example, the result of a math instruction written to color). Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Typo fix a comment.Eric Anholt2011-04-261-1/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Enable constant propagation in 16-wide.Eric Anholt2011-04-261-5/+3
| | | | | | | All that needed fixing was skipping the newly-possible uncompressed/sechalf partial GRF constant writes. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Fix and enable the instruction scheduler for 16-wide.Eric Anholt2011-04-261-8/+42
| | | | | | | | | | Most of the work of the scheduler is agnostic to wide dispatch. It operates on our virtual GRF file, which means instructions are generally referring to 8 or 16 wide naturally. For the MRF file management we're trying to track the actual hardware MRF file, so we need to watch if an instruction writes multiple MRFs. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for 16-wide dispatch with uniforms in use.Eric Anholt2011-04-262-8/+53
| | | | | | | | | | | | This is glued in in a bit of an ugly way -- we rely on the uniforms having been set up by 8-wide dispatch, and we just reuse them without the ability to add new uniforms for any reason, since the 8-wide compile is already completed. Today, this all works out because our optimization passes are effectively the same for both and even if they weren't, we don't reduce the set of uniforms pushed after optimization. Reviewed-by: Kenneth Graunke <[email protected]>
* hash_table: Add an iterator for doing things like cleanup of the HT.Eric Anholt2011-04-262-0/+26
| | | | | | | Without this, consumers often have to keep linked lists of the entries, at additional malloc cost. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add a little whitespace between shader dumping debug.Eric Anholt2011-04-261-1/+5
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for compr4 MRF writes.Eric Anholt2011-04-261-14/+18
| | | | | | | These reduce an emitted (not decoded) instruction per shader on g4x/gen5, but may allow for additional register coalescing as well. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for 16-wide dispatch on gen5.Eric Anholt2011-04-263-12/+93
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add initial support for 16-wide dispatch on gen6.Eric Anholt2011-04-266-81/+210
| | | | | | | | | At this point it doesn't do uniforms, which have to be laid out the same between 8 and 16. Other than that, it supports everything but flow control, which was the thing that forced us to choose 8-wide for general GLSL support. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for discard instructions in 16-wide mode.Eric Anholt2011-04-261-0/+3
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for math instructions in 16-wide mode.Eric Anholt2011-04-263-14/+45
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Fix interference calculation of pixel_[xy] in 16-wide.Eric Anholt2011-04-261-0/+23
| | | | | | Fixes glsl-fs-ceil in that mode, which produced the code in the comment. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Disable some optimization passes under 16-wide for now.Eric Anholt2011-04-262-0/+15
| | | | | | | These are fixable for 16, but that can wait until after it's basically working. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for 16-wide texturing on gen5+.Eric Anholt2011-04-261-21/+29
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for computing pixel_[xy] in 16-wide.Eric Anholt2011-04-262-10/+46
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for 16-wide dispatch to the register allocator.Eric Anholt2011-04-261-19/+37
| | | | | | | | Note that the virtual grfs are in increments of the dispatch_width, not hardware registers -- this makes the 16-wide emit and 8-wide emit mostly the same. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Move the destination reg setup for 8/16 wide to the emit code.Eric Anholt2011-04-264-10/+6
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Use tiling for dri2AllocateBuffer implementationKristian Høgsberg2011-04-261-1/+10
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* intel: Set gen in intelInitScreen, just copy value in intelInitContextKristian Høgsberg2011-04-263-5/+14
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* intel: Use X tiling for DRM EGL ImagesKristian Høgsberg2011-04-261-1/+1
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* mesa: Remove SWcontext::_FogMode, use gl_context::gl_fog_attrib::Mode everywhereIan Romanick2011-04-253-3/+1
| | | | Reviewed-by: Brian Paul <[email protected]>
* main: remove duplicated includesNicolas Kaiser2011-04-252-2/+0
| | | | | | | Remove duplicated includes of guarded headers. Signed-off-by: Nicolas Kaiser <[email protected]> Signed-off-by: Brian Paul <[email protected]>
* mesa: add stricter checks for float formats in the texstore memcpy pathMarek Olšák2011-04-251-0/+2
| | | | | E.g. when the internal format was RGBA16F and the source was RG, it would use memcpy.
* mesa: implement generate-mipmap fallback for RGB10_A2Marek Olšák2011-04-251-0/+80
| | | | | | | | | | I hit this when testing RV350, which lacks RGB10_A2 render target support. It had been missed when implementing the format and probably unused by anything else too. Not applicable to 7.10. Reviewed-by: Eric Anholt <[email protected]>
* st/mesa: fix regression since a22aba4eae9b29db731487bce90e8292f7e82c72Dave Airlie2011-04-251-2/+2
| | | | | | | | | | "st/mesa: check image size before copy_image_data_to_texture()" caused a regression in piglit fbo-generatemipmap-formats test on all gallium drivers. Level 0 for NPOT textures will not match minified values, so don't do this check for level 0. Signed-off-by: Dave Airlie <[email protected]>
* mesa: Add some comments about FRAG_RESULT_COLOR vs FRAG_RESULT_DATAn.Eric Anholt2011-04-231-0/+8
| | | | | This came from reading what swrast does, and 965 now behaves the same and gallium appears to as well.
* mesa: Fix fragment.color (no index) writes with OPTION ARB_draw_buffers.Eric Anholt2011-04-231-3/+8
| | | | | | | | | Fixes a bug in Trine where fragment.color would write FRAG_RESULT_COLOR (which is interpreted by drivers as being the "write this to all color buffers" option) instead of FRAG_RESULT_DATA0 (just the first target). Fixes piglit ATI_draw_buffers/arbfp-no-index.
* i965: Don't double-emit fragment.color writes for MRT with ARB_fp.Eric Anholt2011-04-232-35/+19
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* i965: Fill in the remaining fields of gen5+ sampler default color.Eric Anholt2011-04-231-4/+14
| | | | Still doesn't fix texwrap.
* i965: Fix batch decode for the gen5+ sampler default color.Eric Anholt2011-04-231-6/+24
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* intel: Add support for ARB_sampler_objects.Eric Anholt2011-04-2313-80/+99
| | | | | | | | | | | | This extension support consists of replacing "gl_texture_obj->Sampler." with "_mesa_get_samplerobj(ctx, unit)->". One instance of referencing the texture's base sampler remains in the initial miptree allocation, where I'm not sure we have a clear association with any texture unit. Tested with piglit ARB_sampler_objects/sampler-objects. Reviewed-by: Brian Paul <[email protected]>
* i965: Add support for NV_conditional_render.Eric Anholt2011-04-235-0/+17
| | | | | | | | Since we lack hardware support for it, this is a simple matter of checking _mesa_check_conditional_render at the entrypoints, and suppressing it for the metaops where it doesn't apply. Reviewed-by: Brian Paul <[email protected]>
* swrast: Disable glAccum drawing during conditional rendering.Eric Anholt2011-04-231-0/+4
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* meta: Don't do conditional rendering on GenerateMipmaps and BlitFramebuffer.Eric Anholt2011-04-231-1/+24
| | | | | | | | | The NV_conditional_render spec calls out specific operations that conditional rendering applies to, which doesn't include these. Fixes NV_conditional_render/generatemipmap on swrast. Reviewed-by: Brian Paul <[email protected]>
* i965: Add support for ARB_texture_compression_rgtc.Eric Anholt2011-04-233-0/+11
| | | | | | | | Tested with rgtc-teximage-0[12]. EXT_texture_compression_rgtc/fbo-generatemipmap-formats fails in NPOT just like S3TC does. Reviewed-by: Brian Paul <[email protected]>
* mesa: Don't assert on the compressed convertformat for GenerateMipmaps.Eric Anholt2011-04-231-1/+0
| | | | | | | | | | | | | | This assertion doesn't make any sense to me -- the convertFormat is already something valid (tested above), and the BaseFormat dictated by convertFormat doesn't matter to the function about to be called (it's the datatype/comps that were pulled out of convertFormat). Fixes assertion failure in GL_EXT_texture_compression_rgtc/fbo-generatemipmap-formats (still has a rendering failure in NPOT like S3TC does). Reviewed-by: Brian Paul <[email protected]>
* mesa: Choose RGTC formats for GL_COMPRESSED_RED, GL_COMPRESSED_RG.Eric Anholt2011-04-231-0/+8
| | | | | | | | | We were falling through to the default R8 and RG88 formats instead of compressing when possible. Noticed by swrast fbo-blending-formats actually doing rendering. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa/gdi: Address compiler warnings.José Fonseca2011-04-232-136/+131
| | | | In particular the function prototypes.
* mesa/gdi: Remove InitCritSections.cpp.José Fonseca2011-04-231-33/+0
| | | | | We are now able to declare global critical sections through other mechanisms so this is useless code.
* Drop fx windows driver.José Fonseca2011-04-233-2299/+0
| | | | Irrelevant now that glide driver was removed.
* scons: Build classic mesa gdi driver.José Fonseca2011-04-236-115/+52
| | | | | | Build as scons platform=windows mesagdi
* osmesa: Fix Mingw build.José Fonseca2011-04-231-16/+1
| | | | | | Build as scons platform=windows osmesa
* scons: Build osmesa.José Fonseca2011-04-233-0/+108
| | | | | | Just type scons osmesa
* mesa/vf: Remove.José Fonseca2011-04-235-2257/+0
| | | | Unused. Probably replaced by translate module.
* r300/compiler: fix up error messageMarek Olšák2011-04-221-2/+2
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* swrast: fix readpix clampingMarek Olšák2011-04-221-4/+4
| | | | | | | | | | | | | | | | | | Broken with e5c6a92a12b5cd7db205d72039f58d302b0be9d5. (ARB_color_buffer_float) Clamping should occur if type != float, otherwise the MSBs of the resulting pixels are killed off. For example, reading back LUMINANCE = R+G+B can be greater than 0xff, but the result is naturally masked by 0xff for UNSIGNED_BYTE, leading to bogus results. The following bug report seems to want clamping to occur if type == half_float too. Not sure what's correct. Bug: [bisected pineview] oglc case pxconv-read failed https://bugs.freedesktop.org/show_bug.cgi?id=35852 Tested by: Fang Xun <[email protected]> Reviewed-and-tested-by: Ian Romanick <[email protected]>
* i915: Gut all remaining bits of hardware fogIan Romanick2011-04-214-107/+13
| | | | | | | | | | | None of this ever gets used. Fog is always calculated by a fragment program. Even though the fixed-function fog unit is never used, state updates are still sent to the hardware. Removing those spurious state updates can't hurt performance. Reviewed-by: Eric Anholt <[email protected]> Acked-by: Corbin Simpson <[email protected]> Acked-by: Alex Deucher <[email protected]>
* i915: i915_context::vertex_fog is always I915_FOG_NONE, so kill itIan Romanick2011-04-213-8/+1
| | | | | | Reviewed-by: Eric Anholt <[email protected]> Acked-by: Corbin Simpson <[email protected]> Acked-by: Alex Deucher <[email protected]>
* i915: There's always a fragment programIan Romanick2011-04-211-26/+5
| | | | | | | | | | Fragment programs are generated by core Mesa for fixed-function. Because of this, there's no reason to handle cases where there is no fragment program for fog. Reviewed-by: Eric Anholt <[email protected]> Acked-by: Corbin Simpson <[email protected]> Acked-by: Alex Deucher <[email protected]>
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