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* mesa/main: Move declaration to beginning of scope.José Fonseca2013-11-181-1/+2
| | | | | | Should fix MSVC build. Trivial.
* mesa: Add API debug logging to TexStorageCourtney Goeltzenleuchter2013-11-171-0/+7
| | | | | | | | Give glTexStorage* equivalent debug logging to glTexImage*. Signed-off-by: Courtney Goeltzenleuchter <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Handle !m->Ended for performance monitor result availability.Kenneth Graunke2013-11-171-1/+5
| | | | | | | | | If a performance monitor has never ended, then no result can be available. Core Mesa can easily handle this, saving drivers a tiny bit of complexity. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Track whether a performance monitor has ever ended.Kenneth Graunke2013-11-172-1/+13
| | | | | | | | | | | If a monitor has ended, it means a result should eventually become available, pending some flushing. This is distinct from !m->Active; if a monitor has not been started, then m->Active == false and m->Ended == false. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Also initialize gl_performance_monitor::Active.Kenneth Graunke2013-11-171-0/+2
| | | | | | | | The i965 implementation uses calloc, so I missed this. It's best to simply initialize it to avoid requiring a zeroing allocator, though. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Store the performance monitor object's name.Kenneth Graunke2013-11-172-0/+4
| | | | | | | Being able to print monitor->Name is really useful for debugging. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Fix broken assertsChris Forbes2013-11-172-2/+2
| | | | | | | These would never fire. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Make swizzle_to_scs non-static.Kenneth Graunke2013-11-162-6/+7
| | | | | | | | | | | | | | We'll need this for Broadwell code as well. Normally, when we make things public, we add the "brw" prefix. I'm not crazy about that in this case, since it deals with prog_instruction.h's SWIZZLE_XYZW values, rather than the BRW_SWIZZLE_XYZW enums. However, I can't think of a better name, and at least the comments and code make it clear. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move enum brw_urb_write_flags from brw_eu.h to brw_defines.h.Kenneth Graunke2013-11-162-71/+71
| | | | | | | | | Broadwell code should not include brw_eu.h (since it is for Gen4-7 assembly encoding), but needs the URB write flags enum. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965/fs: Remove force_sechalf stackKenneth Graunke2013-11-163-22/+1
| | | | | | | | | | | Only Gen4 color write setup uses the force_sechalf flag, and it only sets it on a single instruction. It also already has to get a pointer to the instruction and manually set the saturate flag, so we may as well just set force_sechalf the same way and avoid the complexity of a stack. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* dri/common: move source file lists to Makefile.sourcesEmil Velikov2013-11-163-11/+9
| | | | | | | | * Allow the lists to be shared among build systems. * Update automake and Android build systems. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* scons: move SConscript from gallium/targets/ to mesa/drivers/dri/common/Emil Velikov2013-11-162-1/+87
| | | | | | | | Store scons side by side with the other build systems. v2: cleanup after a failed rebase Signed-off-by: Emil Velikov <[email protected]>
* scons: drop obsolete enabled_apis variableEmil Velikov2013-11-161-7/+0
| | | | | | The variable was forgotten during the FEATURE_* removal. Signed-off-by: Emil Velikov <[email protected]>
* Android: remove unused MESA_ENABLED_APIS variableEmil Velikov2013-11-163-6/+0
| | | | | | The variable was forgotten during the FEATURE_* removal. Signed-off-by: Emil Velikov <[email protected]>
* i965: Assert that IF with cmod is Gen6 only.Matt Turner2013-11-152-4/+4
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Add missing break in SHADER_OPCODE_GEN7_SCRATCH_READ case.Vinson Lee2013-11-151-0/+2
| | | | | | | | | Fixes "Missing break in switch" defect reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Cc: "10.0" <[email protected]>
* mesa: Dynamically allocate the storage for program local parameters.Eric Anholt2013-11-154-3/+33
| | | | | | | | | | | | | | | | The array was 64kb per struct gl_program, plus we statically stored a copy of one on disk for _mesa_DummyProgram. Given that most struct gl_programs we generate are for GLSL shaders that don't have local parameters, this was a waste. Since you can store and fetch parameters beyond what the program actually uses, we do have to do a late allocation if necessary at GetProgramLocalParameter time. Reduces peak memory usage in the dota2 trace I made by 76MB (4.5%) Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Remove PROGRAM_ENV_PARAM enum.Eric Anholt2013-11-158-37/+5
| | | | | | | | This has been replaced with referring to env parameters using PROGRAM_STATE_VAR and _mesa_load_state_parameters. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Remove PROGRAM_LOCAL_PARAM enum.Eric Anholt2013-11-158-28/+2
| | | | | | | | This has been replaced with referring to local parameters using PROGRAM_STATE_VAR and _mesa_load_state_parameters. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Update a comment about valid values of a field.Eric Anholt2013-11-151-1/+1
| | | | | | | | Notably, ENV and LOCAL aren't used any more (replaced by STATE_VAR), but apparently CONSTANT is. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Rework brw_new_batch to actually start a new batch.Kenneth Graunke2013-11-151-4/+5
| | | | | | | | | | | | | | | Previously, brw_new_batch was called just after execbuf, but before intel_batchbuffer_reset. Essentially, it prepared for the creation of a new batch, that wasn't yet available, and which it didn't create. This was a bit awkward. This patch makes brw_new_batch call intel_batchbuffer_reset as the very first operation. This means that brw_new_batch actually creates a new batchbuffer, and thus has it available. It brings the creation of the new batchbuffer and BRW_NEW_BATCH flagging together into one place. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Move cache_used_by_gpu flag setting to brw_finish_batch.Kenneth Graunke2013-11-151-6/+6
| | | | | | | It really makes more sense here. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i915: Actually enable __DRI2rendererQueryExtensionRecIan Romanick2013-11-151-0/+1
| | | | | | | | | | | | | | | | | | More rebase fail. This code was written long before i915 and i965 were split, so most of the code in i9[16]5/intel_screen.c only needed to exist in one place. It looks like I fixed n-1 of those places after rebasing on the split. I only found this from the defined-but-not-used warning for intelRendererQueryExtension. I noticed this while fixing the other, related warnings. (Note: During review, we decided to *not* pick this back to 10.0.) Signed-off-by: Ian Romanick <[email protected]> Cc: Daniel Vetter <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* mesa: remove duplicated prototypes in varray.hBrian Paul2013-11-151-6/+0
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* i965: Fix vertical alignment for multisampled buffers.Paul Berry2013-11-151-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From the Sandy Bridge PRM, Vol 1 Part 1 7.18.3.4 (Alignment Unit Size): j [vertical alignment] = 4 for any render target surface is multisampled (4x) From the Ivy Bridge PRM, Vol 4 Part 1 2.12.2.1 (SURFACE_STATE for most messages), under the "Surface Vertical Alignment" heading: This field is intended to be set to VALIGN_4 if the surface was rendered as a depth buffer, for a multisampled (4x) render target, or for a multisampled (8x) render target, since these surfaces support only alignment of 4. Back in 2012 when we added multisampling support to the i965 driver, we forgot to update the logic for computing the vertical alignment, so we were often using a vertical alignment of 2 for multisampled buffers, leading to subtle rendering errors. Note that the specs also require a vertical alignment of 4 for all Y-tiled render target surfaces; I plan to address that in a separate patch. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53077 Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* main: Fix MaxUniformComponents for geometry shaders.Paul Berry2013-11-151-1/+1
| | | | | | | | | | | | | | | For both vertex and fragment shaders we default MaxUniformComponents to 4 * MAX_UNIFORMS. It makes sense to do this for geometry shaders too; if back-ends have different limits they can override them as necessary. Fixes piglit test: spec/glsl-1.50/built-in constants/gl_MaxGeometryUniformComponents Cc: "10.0" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* mesa: Fix derived vertex state not being updated in glCallList()Fredrik Höglund2013-11-151-6/+16
| | | | | | | | | | AEcontext::NewState is not always set when the vertex array state is changed. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71492 Cc: "10.0" <[email protected]> Reviewed-by: José Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965: Initialize schedule_node::delay.Vinson Lee2013-11-141-0/+1
| | | | | | | Fixes "Uninitialized scalar field" defect reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* haiku/swrast: Inherit gl_config, fix flushAlexander von Gluck IV2013-11-142-37/+26
| | | | | | | | * Inherit gl_context so we always have access to it * Thanks curro for the idea. * Last Haiku cannidate for 10.0.0 Reviewed-by: Francisco Jerez <[email protected]>
* dri: Change value param to unsignedIan Romanick2013-11-134-4/+4
| | | | | | | | | This silences some compiler warnings in i915 and i965. See also 75982a5. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "10.0" <[email protected]>
* i965: Use drm_intel_get_aperture_sizes instead of hard-coded 2GiBIan Romanick2013-11-131-3/+7
| | | | | | | | | | Systems with little physical memory installed will report less than 2GiB, and some systems may (hypothetically?) have a larger address space for the GPU. My IVB still reports 1534. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Cc: "10.0" <[email protected]>
* i915: Use drm_intel_get_aperture_sizes instead of drmAgpSizeIan Romanick2013-11-131-2/+6
| | | | | | | | Send the zombie back to the grave before it infects the townsfolk. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Cc: "10.0" <[email protected]>
* i965: implement blit path for PBO glDrawPixelsAlexander Monakov2013-11-132-0/+120
| | | | | | | | | | | | This patch implements accelerated path for glDrawPixels from a PBO in i965. The code follows what intel_pixel_read, intel_pixel_copy, intel_pixel_bitmap and intel_tex_image are doing. Piglit quick.tests show no regressions. In my testing on IVB, performance improvement is huge (about 30x, didn't measure exactly) since generic path goes via _mesa_unpack_color_span_float, memcpy, extract_float_rgba. Signed-off-by: Alexander Monakov <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* haiku: add swrast driverAlexander von Gluck IV2013-11-135-0/+873
| | | | | | | | * This is pretty small and upkeep should be minimal. * Currently fully working. * Cannidate for 10.0.0 branch Acked-by: Brian Paul <[email protected]>
* dri: Remove redundant createNewContext function from __DRIimageDriverExtensionKristian Høgsberg2013-11-121-1/+0
| | | | | | | | | | createContextAttribs is a superset of what createNewContext provides. Also remove the function typedef, since createNewContext is deprecated and no longer used in multiple interfaces. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Cc: "10.0" <[email protected]>
* dri/i915, dri/i965: Fix support for planar imagesAnder Conselvan de Oliveira2013-11-122-2/+4
| | | | | | | | | | | Planar images have format __DRI_IMAGE_FORMAT_NONE, but the patch that moved the conversion from dri_format to the mesa format made it impossible to allocate a image with that format. Signed-off-by: Ander Conselvan de Oliveira <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Cc: "10.0" <[email protected]>
* i965/fs: Try a different pre-scheduling heuristic if the first spills.Eric Anholt2013-11-125-54/+76
| | | | | | | | | | | | | | | | | | | | | | | Since LIFO fails on some shaders in one particular way, and non-LIFO systematically fails in another way on different kinds of shaders, try them both, and pick whichever one successfully register allocates first. Slightly prefer non-LIFO in case we produce extra dependencies in register allocation, since it should start out with fewer stalls than LIFO. This is madness, but I haven't come up with another way to get unigine tropics to not spill while keeping other programs from not spilling and retaining the non-unigine performance wins from texture-grf. total instructions in shared programs: 1626728 -> 1626288 (-0.03%) instructions in affected programs: 1015 -> 575 (-43.35%) GAINED: 50 LOST: 0 Improves Unigine Tropics performance by 14.5257% +/- 0.241838% (n=38) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70445 Cc: "10.0" <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Do instruction pre-scheduling just before register allocation.Eric Anholt2013-11-121-2/+2
| | | | | | | | | | | Long ago, the HW_REG usage in assign_curb/urb_setup() were scheduling barriers, so we had to run scheduler before them in order for it to be able to do basically anything. Now that that's fixed, we can delay the scheduling until we go to allocate (which will make the next change less scary). Cc: "10.0" <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Ignore actual latency pre-reg-alloc.Eric Anholt2013-11-121-21/+29
| | | | | | | | | | | | | | | | We care about depth-until-program-end, as a proxy for "make sure I schedule those early instructions that open up the other things that can make progress while keeping register pressure low", not actual latency (since we're relying on the post-register-alloc scheduling to actually schedule for the hardware). total instructions in shared programs: 1609931 -> 1609931 (0.00%) instructions in affected programs: 0 -> 0 GAINED: 55 LOST: 43 Cc: "10.0" <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Fix message setup for SIMD8 spills.Eric Anholt2013-11-121-1/+1
| | | | | | | | | | | | | | In the SIMD16 spilling changes, I replaced a "1" in the spill path with "mlen", but obviously it wasn't mlen before because spills have the g0 header along with the payload. The interface I was trying to use was asking for how many physical regs we're writing, so we're looking for "1" or "2". I'm guessing this actually passed piglit because the high 8 bits of the execution mask in SIMD8 mode are all 0s. Cc: "10.0" <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/fs: Prefer things we know reduce reg pressure when pre-scheduling.Eric Anholt2013-11-121-0/+144
| | | | | | | | | | | | | | | | | | | | | | | | | Previously, the best thing we had was to schedule the things unblocked by the last chosen instruction, on the hope that it would be consuming two values at the end of their live intervals while only producing one new value. But that's just a guess, and we can do counting of usage of registers to know when an instruction would (almost surely) reduce register pressure. The only failure mode I know of in this new dominant heuristic is that inside of a loop when scheduling the iterator (for example), choosing the last use of the iterator doesn't actually reduce the live interval of the iterator. But it doesn't seem to matter in shader-db: total instructions in shared programs: 1618700 -> 1618700 (0.00%) instructions in affected programs: 0 -> 0 GAINED: 13 LOST: 0 Note: The new functions are made virtual because I expect we'll soon lift the pre-regalloc scheduling heuristic over to the vec4 backend. Cc: "10.0" <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Fix undefined value usage in ABO setup.Eric Anholt2013-11-121-1/+1
| | | | | | | Fixes a compiler warning. Cc: "10.0" <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Add a warning if something ever hits a bug I noticed.Eric Anholt2013-11-121-0/+4
| | | | | | We'd have to map the VBO and rewrite things to a lower stride to fix it. Reviewed-by: Matt Turner <[email protected]>
* meta: enable vertex attributes in the context of the newly created array objectPetr Sebor2013-11-121-2/+3
| | | | | | | | | | | | | | | Otherwise, the function would enable generic vertex attributes 0 and 1 of the array object it does not own. This was causing crashes in Euro Truck Simulator 2, since the incorrectly enabled generic attribute 0 in the foreign context got precedence before vertex position attribute at later time, leading to NULL pointer dereference. Cc: "9.2" <[email protected]> Cc: "10.0" <[email protected]> Signed-off-by: Petr Sebor <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: 80-column wrapping, remove trailing whitespace in arrayobj.cBrian Paul2013-11-121-13/+16
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* mesa: add comment for struct gl_vertex_buffer_bindingBrian Paul2013-11-121-0/+6
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* mesa: call update_array_format() after error checkingBrian Paul2013-11-121-5/+5
| | | | | | | | We try to do all error checking before changing any GL state. Cc: "10.0" <[email protected]> Jordan Justen <[email protected]>
* mesa: use _mesa_is_bufferobj() helper in _mesa_vertex_attrib_address()Brian Paul2013-11-121-3/+4
| | | | | | And use a regular if statment to slightly improve readability. Jordan Justen <[email protected]>
* mesa: add const qualifiers to vertex array helper functionsBrian Paul2013-11-121-4/+4
| | | | Jordan Justen <[email protected]>
* tests: Fix make check for out of tree builds.Rico Schüller2013-11-111-0/+1
| | | | | | Cc: "10.0" <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Rico Schüller <[email protected]>
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