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* i965: Be more aggressive in tracking live/dead intervals within loops.Eric Anholt2010-10-211-13/+41
| | | | | | Fixes glsl-fs-convolution-2, which was blowing up due to the array access insanity getting at the uniform values within the loop. Each temporary was considered live across the whole loop.
* st/mesa: added cases for GL_COMPRESSED_RED/RG in st_choose_format()Brian Paul2010-10-211-0/+2
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* mesa: add missing cases for packing red/green imagesBrian Paul2010-10-211-0/+48
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* mesa: add GL_RG case to _mesa_source_buffer_exists()Brian Paul2010-10-211-0/+1
| | | | Fixes failure with glReadPixels(format=GL_RG)
* i965: Correct scratch space allocation.Eric Anholt2010-10-213-12/+15
| | | | | | | | | | One, it was allocating increments of 1kb, but per thread scratch space is a power of two. Two, the new FS wasn't getting total_scratch set at all, so everyone thought they had 1kb and writes beyond 1kb would go stomping on a neighbor thread. With this plus the previous register spilling for the new FS, glsl-fs-convolution-1 passes.
* i965: Don't emit register spill offsets directly into g0.Eric Anholt2010-10-211-6/+22
| | | | | | | g0 is used by others, and is expected to be left exactly as it was dispatched to us. So manually move g0 into our message reg when spilling/unspilling and update the offset in the MRF. Fixes failures in texture sampling after having spilled a register.
* i965: Add support for register spilling.Eric Anholt2010-10-218-55/+380
| | | | | It can be tested with if (0) replaced with if (1) to force spilling for all virtual GRFs. Some simple tests work, but large texturing tests fail.
* i965: Fix gl_FrontFacing emit on pre-gen6.Eric Anholt2010-10-211-1/+0
| | | | | | | | | It's amazing this code worked. Basically, we would get lucky in register allocation and the tests using frontfacing would happen to allocate gl_FrontFacing storage and the instructions generating gl_FrontFacing but pointing at another register to the same hardware register. Noticed during register spilling debug, when suddenly they didn't get allocatd the same storage.
* i965: Split register allocation out of the ever-growing brw_fs.cpp.Eric Anholt2010-10-213-216/+266
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* mesa: Remove unused vtxfmt_tmp.h.Chia-I Wu2010-10-211-603/+0
| | | | | It was used by the "neutral" tnl module that was dropped in 81ccb3e2ce708619f4c23537a237d61bdffdd35f.
* swrast: Print out format on unexpected failure in _swrast_DrawPixels.Vinson Lee2010-10-201-1/+1
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* mesa: Remove FEATURE_ARB_shading_language_120 macro.Kenneth Graunke2010-10-202-5/+0
| | | | Everything should be able to support 1.20 at this point.
* osmesa: link against libtallocOrion Poplawski2010-10-201-1/+1
| | | | | | Otherwise consumers have to, and that's lame. Signed-off-by: Adam Jackson <[email protected]>
* i965: Use the new style of IF statement with embedded comparison on gen6.Eric Anholt2010-10-192-4/+113
| | | | | "Everyone else" does it this way, so follow suit. It's fewer instructions, anyway.
* i965: Set the source operand types for gen6 if/else/endif to integer.Eric Anholt2010-10-191-6/+6
| | | | | I don't think this should matter, but I'm not sure, and it's recommended by a kernel checker in fulsim.
* i965: Add EU emit support for gen6's new IF instruction with comparison.Eric Anholt2010-10-192-1/+31
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* i965: Disable thread dispatch when the FS doesn't do any work.Eric Anholt2010-10-193-4/+49
| | | | | | This should reduce the cost of generating shadow maps, for example. No performance difference measured in nexuiz, though it does trigger this path.
* i965: Remove the gen6 emit_mi_flushes I sprinkled around the driver.Eric Anholt2010-10-1910-26/+0
| | | | | These were for debugging in bringup. Now that relatively complicated apps are working, they haven't helped debug anything in quite a while.
* i965: Tell the shader compiler when we expect depth writes for gen6.Eric Anholt2010-10-191-0/+6
| | | | | | | | This fixes hangs in some Z-writes-in-shaders tests, though other pieces don't come out correctly. Bug #30392: hang in fbo-fblit-d24s8. (still fails with bad color drawn to some targets)
* mesa: fix mesa version string constructionBrian Paul2010-10-191-1/+1
| | | | | Now that MESA_MINOR=10, we no longer need the extra '0' in the version string.
* mesa: Make sure we have the talloc cflags when using the talloc headersThomas Hellstrom2010-10-191-1/+1
| | | | Signed-off-by: Thomas Hellstrom <[email protected]>
* r300/compiler: Remove unused variable.Vinson Lee2010-10-191-1/+1
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* r300g: Add new debug option for logging vertex/fragment program statsTom Stellard2010-10-185-9/+70
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* r300/compiler: Add a new function for more efficient dataflow analysisTom Stellard2010-10-187-132/+397
| | | | | | | rc_get_readers_normal() supplies a list of readers for a given instruction. This function is now being used by the copy propagate optimization and will eventually be used by most other optimization passes as well.
* r300/compiler: Clear empty registers after constant foldingTom Stellard2010-10-181-0/+8
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* r300/compiler: Fix incorrect assumptionTom Stellard2010-10-183-32/+17
| | | | | It is possible for a single pair instruction arg to select from both an RGB and an Alpha source.
* r300/compiler: Create a helper function for merging presubtract sourcesTom Stellard2010-10-181-117/+102
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* i965: Remove unused variable.Kenneth Graunke2010-10-181-1/+0
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* i965: Avoid blits in BufferCopySubdata on gen6.Eric Anholt2010-10-181-1/+2
| | | | Fixes glean/bufferObject.
* i965: Fix scissor-offscreen on gen6 like we did pre-gen6.Eric Anholt2010-10-181-1/+13
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* i965: Assert out on gen6 VS constant buffer reads that hang the GPU for now.Eric Anholt2010-10-181-0/+4
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* i965: Fix assertion failure on gen6 BufferSubData to busy BO.Eric Anholt2010-10-181-10/+17
| | | | Fixes fbo-blit and probably several other tests.
* i965: Fix a weirdness in NOT handling.Eric Anholt2010-10-181-1/+1
| | | | | XOR makes much more sense. Note that the previous code would have failed for not(not(x)), but that gets optimized out.
* i965: Disable the debug printf I added for FS disasm.Eric Anholt2010-10-181-5/+7
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* i965: Add missing "break" statement.Kenneth Graunke2010-10-181-0/+1
| | | | | Otherwise, it would try to handle arrays as structures, use uninitialized memory, and crash.
* mesa: Add missing else in do_row_3DBrian Rogers2010-10-181-1/+1
| | | | | | This fixes erroneous "bad format in do_row()" messages Signed-off-by: Brian Paul <[email protected]>
* st/mesa: update function name, commentsBrian Paul2010-10-151-6/+14
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* st/mesa: use GLuint to avoid problem w/ uint not defined on mingw32Brian Paul2010-10-151-1/+1
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* st/mesa: reformatting in st_cb_drawpixels.cBrian Paul2010-10-151-20/+32
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* st/mesa: fix regressions in glDrawPixels(GL_STENCIL_INDEX)Brian Paul2010-10-152-7/+23
| | | | | | We need to keep track of three different fragment shaders: Z-only, stencil- only, and Z+stencil. Before, we were only keeping track of the first one we encountered.
* i965: Set the type of the null register to fix gen6 FS comparisons.Eric Anholt2010-10-152-24/+41
| | | | | | | | | | We often use reg_null as the destination when setting up the flag regs. However, on gen6 there aren't general implicit conversions to destination types from src types, so the comparison to produce the flag regs would be done on the integer result interpreted as a float. Hilarity ensued. Fixes 20 piglit cases.
* i965: Fix indentation after commit 3322fbafIan Romanick2010-10-151-45/+45
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* mesa: Add missing header to shaderobj.h.Vinson Lee2010-10-151-0/+1
| | | | Include compiler.h for ASSERT symbol.
* glsl: Slightly change the semantic of _LinkedShadersIan Romanick2010-10-147-52/+45
| | | | | | | | | | | | | | | Previously _LinkedShaders was a compact array of the linked shaders for each shader stage. Now it is arranged such that each slot, indexed by the MESA_SHADER_* defines, refers to a specific shader stage. As a result, some slots will be NULL. This makes things a little more complex in the linker, but it simplifies things in other places. As a side effect _NumLinkedShaders is removed. NOTE: This may be a candidate for the 7.9 branch. If there are other patches that get backported to 7.9 that use _LinkedShader, this patch should be cherry picked also.
* i965: Fix texturing on pre-gen5.Eric Anholt2010-10-141-5/+5
| | | | | I broke it in 06fd639c519214b6ebcbf29127b6d9ed429f8641 by only testing 2 generations of hardware :(
* mesa: remove post-convolution width/height varsBrian Paul2010-10-141-35/+19
| | | | These were left-over bits from when convolution was removed.
* i965: Add support for ir_unop_round_even via the RNDE instruction.Kenneth Graunke2010-10-143-0/+8
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* glsl: Add a new ir_unop_round_even opcode for GLSL 1.30's roundEven.Kenneth Graunke2010-10-141-0/+1
| | | | Also, update ir_to_mesa's "1.30 is unsupported" case to "handle" it.
* i965: Clean up a warning in the old fragment backend.Kenneth Graunke2010-10-141-1/+5
| | | | Hopefully this code can just go away soon.
* i965: Enable the new FS backend on pre-gen6 as well.Eric Anholt2010-10-141-12/+1
| | | | | | | | | | | It is now to the point where we have no regressing piglit tests. It also fixes Yo Frankie! and Humus DynamicBranching, probably due to the piglit bias tests that work that didn't on the Mesa IR backend. As a downside, performance takes about a 5-10% performance hit at the moment (e.g. nexuiz 19.8fps -> 18.8fps), which I plan to resolve by reintroducing 16-wide fragment shaders where possible. It is a win, though, for fragment shaders using flow control.
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