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* mesa/extensions: restrict luminance alpha formats to API_OPENGL_COMPATNanley Chery2015-09-152-4/+6
| | | | | | | According the GL 3.1 spec, luminance alpha formats are deprecated. Reviewed-by: Anuj Phogat <[email protected]> Signed-off-by: Nanley Chery <[email protected]>
* i965: Move perf_debug code to brw_codegen_*_prog()Kristian Høgsberg Kristensen2015-09-145-76/+75
| | | | | | | | | | We're trying to avoid a libdrm dependency in the core compiler, so let's move the perf_debug code one level up from the brw_*_emit() helpers to the brw_codegen_*_prog() helpers. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Signed-off-by: Kristian Høgsberg Kristensen <[email protected]>
* i965: Move brw_fs_precompile() to brw_wm.cKristian Høgsberg Kristensen2015-09-142-58/+59
| | | | | | | | | All other precompile functions live in the brw_<stage>.c files, make fs follow the convention. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Signed-off-by: Kristian Høgsberg Kristensen <[email protected]>
* i965: Move compute shader code aroundKristian Høgsberg Kristensen2015-09-145-333/+362
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This moves the compute shader code around in order to make the way the code is split up more consistent. There should be no functional changes. Typically we have a few files per stage: brw_vs.c, brw_wm.c brw_gs.c: code to drive code generation and implement precompiling and cache search. genX_<stage>_state.c gen specific implementation of the state emission for the shader stage. The brw_*_emit() functions are all in the same files as the visitor classes they use (with the exception of VS, which may use either vec4 or fs). To make compute follow this convention, we move the brw_cs_emit() function into brw_fs.cpp. We can then rename brw_cs.cpp to brw_cs.c and do this in C like the other similar files. Finally, move state setup and atoms to gen7_cs_state.c. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Signed-off-by: Kristian Høgsberg Kristensen <[email protected]>
* meta: Abort meta pbo path if TexSubImage need signed unsigned conversionAnuj Phogat2015-09-141-18/+25
| | | | | | | | | See similar fix for Readpixels in mesa commit 0d20790. Jason suggested we need that for TexSubImage as well. Cc: <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4_nir: Load constants as integersAntia Puentes2015-09-141-2/+2
| | | | | | | | | | | Loads constants using integer as their register type, like it is done in FS backend. No shader-db changes in HSW. Cc: "10.6 11.0" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91716 Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Fix saturation errors when coalescing registersAntia Puentes2015-09-141-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the register types do not match and the instruction that contains the final destination is saturated, register coalescing generated non-equivalent code. This did not happen when using IR because types usually matched, but it is visible in nir-vec4. For example, mov vgrf7:D vgrf2:D mov.sat m4:F vgrf7:F is coalesced to: mov.sat m4:D vgrf2:D The patch prevents coalescing in such scenario, unless the instruction we want to coalesce into is a MOV (without type conversion implied). In that case, the patch sets the register types to the type of the final destination. Shader-db results in HSW (only vec4 instructions shown): total instructions in shared programs: 1754415 -> 1754416 (0.00%) instructions in affected programs: 74 -> 75 (1.35%) helped: 0 HURT: 1 GAINED: 0 LOST: 0 Only one extra instruction in one of the shaders, that comes from eliminating a saturation error by preventing register coalesce. Cc: "10.6 11.0" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* st/mesa: emit TXQS, support ARB_shader_texture_image_samplesIlia Mirkin2015-09-132-1/+6
| | | | | | | | | The image component of the ext is a no-op since there is no image support in gallium (yet). Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965/nir: Support gl_WorkGroupID variableJordan Justen2015-09-131-1/+9
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965/cs: Initialize gl_WorkGroupID variable from payloadJordan Justen2015-09-132-0/+20
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965/nir: Support gl_LocalInvocationID variableJordan Justen2015-09-131-0/+17
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965/cs: Initialize gl_LocalInvocationID from payloadJordan Justen2015-09-132-2/+24
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965/cs: Initialize gl_LocalInvocationID in push constant dataJordan Justen2015-09-131-4/+52
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965/cs: Reserve local invocation id in payload regsJordan Justen2015-09-134-0/+45
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/vec4: Don't reswizzle hardware registersJason Ekstrand2015-09-121-0/+8
| | | | | | Cc: "11.0 10.6" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91719 Reviewed-by: Kenneth Graunke <[email protected]>
* i965/emit: Add assertions for accumulator restrictionsJason Ekstrand2015-09-121-0/+17
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: check writemask when bailing out at register coalesceAlejandro Piñeiro2015-09-111-4/+6
| | | | | | | | | | | | | | | | | | | | | | | opt_register_coalesce stopped to check previous instructions to coalesce with if somebody else was writing on the same destination. This can be optimized to check if somebody else was writing to the same channels of the same destination using the writemask. Shader DB results (taking into account only vec4): total instructions in shared programs: 1781593 -> 1734957 (-2.62%) instructions in affected programs: 1238390 -> 1191754 (-3.77%) helped: 12782 HURT: 0 GAINED: 0 LOST: 0 v2: removed some parenthesis, fixed indentation, as suggested by Matt Turner v3: added brackets, for consistency, as suggested by Eduardo Lima Reviewed-by: Matt Turner <[email protected]>
* i965: Use hash tables for brw_fs_vector_splitting().Kenneth Graunke2015-09-111-22/+22
| | | | | | | | | | | | | | | Cuts compile/link time of the fragment shader in #91857 by 25% (21.64 -> 16.28). v2: Drop unnecessary _mesa_hash_table_destroy call, and use refs.ht->entries == 0 rather than ad-hoc checking (suggested by Timothy Arceri). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91857 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Thomas Helland <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Tested-by: Tapani Pälli <[email protected]>
* meta: Use result of texture coordinate clamping operationIan Romanick2015-09-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Previously the result of the complicated clamp() expression just dropped on the floor: clamp does not modify any of its parameters. Looking at the surrounding code, I believe this is supposed to modify the value of tex_coord. This change (along with a change to avoid the use of brw_blorp_framebuffer) does not affect any existing piglit tests. I'm not sure what this clamp is trying to accomplish, so I'm not sure how to write a test to exercise this path. I also noticed another bug in this code. There is no way the array texture case could possibly work. This will generate code for the TEXEL_FETCH macro like: #define TEXEL_FETCH(coord) texelFetch(texSampler, ivec3(coord), sample_map[int(2 * fract(coord.x))]); Since the coord parameter of this macro is a vec2 at all invocations, no expansion of this macro will even compile. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Cc: Topi Pohjolainen <[email protected]> Cc: Jordan Justen <[email protected]>
* meta: Always bind the textureIan Romanick2015-09-101-3/+6
| | | | | | | | | | | | | | | | We may have been called from glGenerateTextureMipmap with CurrentUnit still set to 0, so we don't know when we can skip binding the texture. Assume that _mesa_BindTexture will be fast if we're rebinding the same texture. v2: Remove currentTexUnitSave because it is now unused. Suggested by both Neil and Anuj. Signed-off-by: Ian Romanick <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91847 Cc: "11.0" <[email protected]> Reviewed-by: Neil Roberts <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i915, i965: Silence unused parameter warnings in intel_batchbuffer_advanceIan Romanick2015-09-102-0/+4
| | | | | | | | | | | | | These only occurred in release builds, but they occurred in every file that included intel_batchbuffer.h. Lots of spam. :( intel_batchbuffer.h: In function 'intel_batchbuffer_advance': intel_batchbuffer.h:153:47: warning: unused parameter 'brw' [-Wunused-parameter] intel_batchbuffer_advance(struct brw_context *brw) ^ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i915: Silence unused parameter warning in intel_miptree_create_layoutIan Romanick2015-09-103-15/+5
| | | | | | | | | | | | | | The for_bo parameter of intel_miptree_create_layout appears to be unused since 27eedca when Eric removed some Gen5 code (after the i915 and i965 drivers parted ways). intel_mipmap_tree.c: In function 'old_intel_miptree_create_layout': intel_mipmap_tree.c:77:35: warning: unused parameter 'for_bo' [-Wunused-parameter] bool for_bo) ^ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i915, i965: Silence unused parameter warnings in intel_miptree_unmap_gttIan Romanick2015-09-102-12/+4
| | | | | | | | | | | | | | | | intel_mipmap_tree.c: In function 'intel_miptree_unmap_gtt': intel_mipmap_tree.c:777:34: warning: unused parameter 'map' [-Wunused-parameter] struct intel_miptree_map *map, ^ intel_mipmap_tree.c:778:17: warning: unused parameter 'level' [-Wunused-parameter] unsigned int level, ^ intel_mipmap_tree.c:779:17: warning: unused parameter 'slice' [-Wunused-parameter] unsigned int slice) ^ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i915: Silence unused parameter warningsIan Romanick2015-09-103-7/+5
| | | | | | | | | | intel_mipmap_tree.c: In function 'old_intel_miptree_unmap_raw': intel_mipmap_tree.c:726:51: warning: unused parameter 'intel' [-Wunused-parameter] intel_miptree_unmap_raw(struct intel_context *intel, ^ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i915: Remove prototype for nonexistent brw_miptree_layoutIan Romanick2015-09-101-2/+0
| | | | | | | | Hasn't existed in the i915 source since the i915 and i965 drivers parted ways. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Make intel_miptree_map_raw staticIan Romanick2015-09-102-19/+17
| | | | | | | | | | This hasn't been used outside intel_mipmap_tree.c since d5d4ba9 started using meta instead of the blitter for PBO TexSubImage. While we're here, remove the unused brw parameter from the function formerly known as intel_miptree_unmap_raw. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i915, i965: Silence unused parameter warnings in intel_mipmap_tree.hIan Romanick2015-09-102-0/+8
| | | | | | | | | | | | | | | | | | | These only occurred in release builds, but they occurred in every file that included intel_mipmap_tree.h. Lots of spam. :( intel_mipmap_tree.h: In function 'intel_miptree_check_level_layer': intel_mipmap_tree.h:595:59: warning: unused parameter 'mt' [-Wunused-parameter] intel_miptree_check_level_layer(struct intel_mipmap_tree *mt, ^ intel_mipmap_tree.h:596:42: warning: unused parameter 'level' [-Wunused-parameter] uint32_t level, ^ intel_mipmap_tree.h:597:42: warning: unused parameter 'layer' [-Wunused-parameter] uint32_t layer) ^ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Silence unused parameter warnings in intel_mipmap_tree.cIan Romanick2015-09-103-11/+9
| | | | | | | | | | | | | | | | | | | | | | The target parameter of compute_msaa_layout appears to be unused since 83b83fb when support for CMS textures was added for Gen7. The brw parameter of intel_get_non_msrt_mcs_alignment appears to be unused since e92fbdc when the GEN check (along with the "can we fast clear" decision) was moved to a different function. intel_mipmap_tree.c: In function 'compute_msaa_layout': intel_mipmap_tree.c:62:73: warning: unused parameter 'target' [-Wunused-parameter] compute_msaa_layout(struct brw_context *brw, mesa_format format, GLenum target, ^ intel_mipmap_tree.c: In function 'intel_get_non_msrt_mcs_alignment': intel_mipmap_tree.c:143:54: warning: unused parameter 'brw' [-Wunused-parameter] intel_get_non_msrt_mcs_alignment(struct brw_context *brw, ^ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Cc: Ben Widawsky <[email protected]>
* i965: Silence unused parameter warnings in intel_fbo.cIan Romanick2015-09-101-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | intel_fbo.c: In function 'intel_alloc_window_storage': intel_fbo.c:415:48: warning: unused parameter 'ctx' [-Wunused-parameter] intel_alloc_window_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, ^ intel_fbo.c: In function 'intel_nop_alloc_storage': intel_fbo.c:428:74: warning: unused parameter 'rb' [-Wunused-parameter] intel_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, ^ intel_fbo.c:429:32: warning: unused parameter 'internalFormat' [-Wunused-parameter] GLenum internalFormat, GLuint width, GLuint height) ^ intel_fbo.c:429:55: warning: unused parameter 'width' [-Wunused-parameter] GLenum internalFormat, GLuint width, GLuint height) ^ intel_fbo.c:429:69: warning: unused parameter 'height' [-Wunused-parameter] GLenum internalFormat, GLuint width, GLuint height) ^ intel_fbo.c: In function 'intel_blit_framebuffer_with_blitter': intel_fbo.c:790:61: warning: unused parameter 'filter' [-Wunused-parameter] GLbitfield mask, GLenum filter) ^ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* st/mesa: set the vbuffer to NULL if we are skipping itDave Airlie2015-09-111-1/+5
| | | | | | | | | | | | If we skip a vbuffer we need to make sure we NULL out the contents, otherwise when it gets passed to the driver it will get confused. This was hit by: GL41-CTS.gpu_shader_fp64.varyings Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965/cs: Enable barrier in MEDIA_INTERFACE_DESCRIPTORJordan Justen2015-09-104-1/+8
| | | | | | | | | | | | | Enable barrier in MEDIA_INTERFACE_DESCRIPTOR if the program uses the barrier() GLSL function. On Ivy Bridge and Haswell, this allows the piglit test tests/spec/arb_compute_shader/execution/simple-barrier-atomics.shader_test to pass. On gen8, this enables a similar test with a local group size of 896 to pass. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965/cs: Emit texture surfaces to enable CS samplingJordan Justen2015-09-102-1/+3
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: Set up sampler state for compute shadersJordan Justen2015-09-101-2/+12
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965/fs: Set first_non_payload_grf in assign_curb_setupJordan Justen2015-09-101-4/+5
| | | | | | | | | | | | first_non_payload_grf may be updated in assign_urb_setup for FS or assign_vs_urb_setup for VS. We need to set this in assign_curb_setup for compute shaders since cs does not have an assign_cs_urb_setup like assign_urb_setup (fs) or assign_vs_urb_setup (vs). Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: Support compute shaders in is_scalar_shader_stage()Jordan Justen2015-09-101-0/+1
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: Support CS in update_stage_texture_surfacesJordan Justen2015-09-101-0/+7
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: enable ARB_shader_texture_image_samplesIlia Mirkin2015-09-101-0/+1
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: add handling for imageSamplesIlia Mirkin2015-09-101-0/+5
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: add support for textureSamples functionIlia Mirkin2015-09-1010-1/+35
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> [v2: kayden-supplied code in fs_nir replacing need for logical opcode] Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: add ir_texture_samples texture opcodeIlia Mirkin2015-09-102-0/+4
| | | | | | | | Will be used for textureSamples() Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: add infra for ARB_shader_texture_image_samplesIlia Mirkin2015-09-102-0/+2
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix typos in licenseIan Romanick2015-09-1033-66/+66
| | | | | | | | | | | | | | | | grep -lr 'sub license' | while read f; do \ sed --in-place -e 's/sub license/sublicense/' $f ;\ done grep -lr 'NON-INFRINGEMENT' | while read f; do \ sed --in-place -e 's/NON-INFRINGEMENT/NONINFRINGEMENT/' $f ;\ done As noted by Matt, both of these changes match the MIT license text found at http://opensource.org/licenses/MIT. Signed-off-by: Ian Romanick <[email protected]> Acked-by: Matt Turner <[email protected]>
* i965: Remove horizontal bars from file header commentsIan Romanick2015-09-1031-129/+62
| | | | | | | Why was that ever a thing? Signed-off-by: Ian Romanick <[email protected]> Acked-by: Matt Turner <[email protected]>
* i965: Resolve GCC sign-compare warning.Rhys Kidd2015-09-104-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mesa/src/mesa/drivers/dri/i965/brw_eu_compact.c: In function 'set_3src_control_index': mesa/src/mesa/drivers/dri/i965/brw_eu_compact.c:805:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (int i = 0; i < ARRAY_SIZE(gen8_3src_control_index_table); i++) { ^ mesa/src/mesa/drivers/dri/i965/brw_eu_compact.c: In function 'set_3src_source_index': mesa/src/mesa/drivers/dri/i965/brw_eu_compact.c:839:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (int i = 0; i < ARRAY_SIZE(gen8_3src_source_index_table); i++) { ^ mesa/src/mesa/drivers/dri/i965/brw_state_dump.c: In function 'dump_sampler_state': mesa/src/mesa/drivers/dri/i965/brw_state_dump.c:382:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (i = 0; i < size / 16; i++) { ^ mesa/src/mesa/drivers/dri/i965/brw_state_upload.c: In function 'brw_pipeline_state_finished': mesa/src/mesa/drivers/dri/i965/brw_state_upload.c:801:13: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] if (i != pipeline) { ^ mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c: In function 'intel_gen7_hiz_buf_create': mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c:1544:47: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (int level = mt->first_level; level <= mt->last_level; ++level) { ^ mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c: In function 'intel_gen8_hiz_buf_create': mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c:1638:44: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (int level = mt->first_level; level <= mt->last_level; ++level) { ^ mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c: In function 'intel_miptree_alloc_hiz': mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c:1771:44: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (int level = mt->first_level; level <= mt->last_level; ++level) { ^ mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c:1775:33: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (int layer = 0; layer < mt->level[level].depth; ++layer) { ^ Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Thomas Helland <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: Resolve GCC sign-compare warning.Rhys Kidd2015-09-101-1/+1
| | | | | | | | | | | | mesa/src/mesa/program/prog_to_nir.c: In function 'setup_registers_and_variables': /mesa/src/mesa/program/prog_to_nir.c:1059:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (int i = 0; i < c->prog->NumTemporaries; i++) { ^ Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Thomas Helland <[email protected]> Reviewed-by: Jan Vesely <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: Resolve GCC missing field initializer warning.Rhys Kidd2015-09-101-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Resolve a series of missing field initializer warnings within get_hash_params.py Of the form: In file included from mesa/src/mesa/main/get.c:495:0: mesa/src/mesa/main/get_hash.h:180:5: warning: missing initializer for field 'extra' of 'const struct value_desc' [-Wmissing-field-initializers] { GL_POINT_SIZE_ARRAY_BUFFER_BINDING_OES, LOC_CUSTOM, TYPE_INT, 0 }, ^ mesa/src/mesa/main/get.c:165:15: note: 'extra' declared here const int *extra; ^ This patch addresses some likely code rot around the *extra field, where the initialization is via C code generated indirectly from a Python script. It resolves a number of warnings reported by GCC when configured to be pedantic. $ gcc --version gcc (Ubuntu 4.9.2-10ubuntu13) 4.9.2 No piglit regressions on Ironlake. v2: - Squash series into a single patch. Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Jan Vesely <[email protected]> Reviewed-by: Thomas Helland <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965: Advertise 65536 for GL_MAX_UNIFORM_BLOCK_SIZE.Kenneth Graunke2015-09-101-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Our old value of 16384 is the minimum value. DirectX apparently requires 65536 at a minimum; that's also what nVidia and the Intel Windows driver advertise. AMD advertises MAX_INT. Ilia Mirkin noticed that "Shadow Warrior" uses UBOs larger than 16k on Nouveau, which advertises 65536 bytes for this limit. Traces captured on Nouveau don't work on i965 because our lower limit causes the GLSL linker to reject the captured shaders. While this isn't important in and of itself, it does suggest that raising the limit would be beneficial. We can read linear buffers up to 2^27 bytes in size, so raising this should be safe; we could probably even go larger. For now, matching nVidia and Intel/Windows seems like a good plan. We have to reinitialize MaxCombinedUniformComponents as core Mesa will have set it based on a stale value for MaxUniformBlockSize. According to Tapani, there's an unreleased game that asserts on this. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Cc: "11.0" <[email protected]>
* glsl: Silence unused parameter warningsIan Romanick2015-09-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | builtin_variables.cpp:1062:53: warning: unused parameter 'name_as_gs_input' [-Wunused-parameter] const char *name_as_gs_input) ^ builtin_functions.cpp:4774:47: warning: unused parameter 'intrinsic_name' [-Wunused-parameter] const char *intrinsic_name, ^ builtin_functions.cpp:4907:66: warning: unused parameter 'state' [-Wunused-parameter] _mesa_glsl_find_builtin_function_by_name(_mesa_glsl_parse_state *state, ^ builtin_functions.cpp:4915:49: warning: unused parameter 'num_arguments' [-Wunused-parameter] unsigned num_arguments, ^ builtin_functions.cpp:4916:49: warning: unused parameter 'flags' [-Wunused-parameter] unsigned flags) ^ ir_print_visitor.cpp:589:37: warning: unused parameter 'ir' [-Wunused-parameter] ir_print_visitor::visit(ir_barrier *ir) ^ linker.cpp:3212:48: warning: unused parameter 'ctx' [-Wunused-parameter] build_program_resource_list(struct gl_context *ctx, ^ standalone_scaffolding.cpp:65:57: warning: unused parameter ‘id’ [-Wunused-parameter] _mesa_shader_debug(struct gl_context *, GLenum, GLuint *id, ^ v2: Rebase on top of GL_ARB_shader_image_size work (especially 58a86897). Silence more warnings added by that work. v3: Remove mention of the removed parameter from comments. Suggested by Iago. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> [v1] Reviewed-by: Iago Toral Quiroga <[email protected]> Cc: "Martin Peres <[email protected]>"
* nir/glsl: Use lower_outputs_to_temporaries instead of relying on GLSL IRJason Ekstrand2015-09-091-3/+0
| | | | Reviewed-by: Ian Romanick <[email protected]>
* mesa: automake: rework the source generation rulesEmil Velikov2015-09-091-27/+18
| | | | | | | | | | | | | | | Same logic as previous commit applies. Additionally remove the odd (set -e/mv/INDENT) from the rules. The last one is the only one we remotely care about, if reading the generated sources. Upcoming work from DylanB which will replace the existing python scripts with ones that produce more readable output anyway. Cc: 11.0 <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
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