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* mesa: Fix build breakage caused by c73e6ceIan Romanick2011-03-013-11/+16
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* Add generated parser / lexer files to gitignore listsIan Romanick2011-03-011-0/+3
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* mesa: Remove files generated by flex and bison from GITIan Romanick2011-03-013-9620/+0
| | | | These files were for the ARB_vertex_program / ARB_fragement_program assembler.
* st/mesa: probably handle instanced drawingChristian König2011-03-011-12/+23
| | | | Remove the previous workaround for instanced drawing and implement it correctly.
* intel: Support glCopyTexImage() from ARGB8888 to XRGB8888.Kenneth Graunke2011-03-011-2/+11
| | | | Nexuiz was hitting a software fallback.
* i965: Use negative relocation deltas to minimse vertex uploadsChris Wilson2011-03-014-8/+27
| | | | | | | | | | | | With relaxed relocation checking in the kernel, we can specify a negative delta (i.e. pointing outside of the target bo) in order to fake a range in a large buffer. We only then need to upload the elements used and adjust the buffer offset such that they correspond with the indices used in the DrawArrays. (Depends on libdrm 0209428b3918c4336018da9293cdcbf7f8fedfb6) Signed-off-by: Chris Wilson <[email protected]>
* i965: Undo 'continuation of vb packets'Chris Wilson2011-03-011-1/+1
| | | | | This breaks nexuiz for unknown reason; disable until a true fix can be found.
* i965: Fix uploading of shortened vertex packetsChris Wilson2011-03-011-12/+13
| | | | | | ... handle all cases and not just the interleaved upload. Signed-off-by: Chris Wilson <[email protected]>
* i965: Upload all vertices usedChris Wilson2011-03-012-31/+38
| | | | | | | | | | ... and take advantage of start_vertex_bias to trim to [min_index, max_index] where possible (i.e. when we need to upload all arrays). Fixes half_float_vertex(misc.fillmode.wireframe) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34595 Signed-off-by: Chris Wilson <[email protected]>
* Revert "i965/fs: Correctly set up gl_FragCoord.w on Sandybridge."Kenneth Graunke2011-03-011-1/+1
| | | | | This reverts commit 4a3b28113c3d23ba21bb8b8f5ebab7c567083a6d, as it caused a regression on Ironlake (bug #34646).
* i965: bump VS thread number to 60 on SNBZou Nan hai2011-03-012-2/+11
| | | | Signed-off-by: Zou Nan hai <[email protected]>
* rgtc: shared the compressor code between signed/unsignedDave Airlie2011-03-012-696/+403
| | | | | | | | No idea why I didn't do it like this the first time, but share the code like other portions of mesa do using _tmp.h suffix and some #defines for the types. Signed-off-by: Dave Airlie <[email protected]>
* vbo: silence unused var warningBrian Paul2011-02-281-0/+1
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* mesa: move PBO-related functions into a new fileBrian Paul2011-02-2829-391/+488
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* mesa: always generate error in glColorTableParameter[fi]v()Brian Paul2011-02-281-23/+6
| | | | These were only used by GL_SGI_texture_color_table, which is gone now.
* mesa: remove GL_SGI_texture_color_table supportBrian Paul2011-02-289-154/+1
| | | | | | It was only implemented in the swrast driver and probably not used by any applications. A modern app would use a dependent/chained texture lookup in the fragment shader.
* mesa: consolidate framebuffer target lookup codeBrian Paul2011-02-281-89/+33
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* mesa: remove some old do-nothing codeBrian Paul2011-02-281-3/+0
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* mesa: reduce calls to _mesa_test_framebuffer_completeness()Brian Paul2011-02-281-1/+1
| | | | | when updating/validating framebuffer state. The _Status field is set to zero when we need to recompute _Status. Otherwise, it's up to date.
* mesa: reduce calls to _mesa_test_framebuffer_completeness()Brian Paul2011-02-281-2/+6
| | | | | | when doing glCopyTex[Sub]Image() and checking the source buffer's completeness. We only need to determine FBO completeness when the status is indeterminate.
* mesa: s/mesaFormat/attFormat/Brian Paul2011-02-281-4/+4
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* rgtc: fix void pointer arith.Dave Airlie2011-03-011-2/+2
| | | | should fix scons build.
* glsl: Enable GL_OES_texture_3D extension for ES2.Kenneth Graunke2011-02-281-2/+1
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* mesa: Add texcompress_rgtc.c to SConscript.Vinson Lee2011-02-271-0/+1
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* mesa/st: add RGTC format support.Dave Airlie2011-02-282-0/+33
| | | | this just adds a format check + format conversion.
* swrast: add RGTC supportDave Airlie2011-02-282-0/+20
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* mesa: Add RGTC texture store/fetch support.Dave Airlie2011-02-288-3/+1287
| | | | | | | | | This adds support for the RGTC unsigned and signed texture storage and fetch methods. the code is a port of the DXT5 alpha compression code. Signed-off-by: Dave Airlie <[email protected]>
* mesa: make_float_temp_image non-staticDave Airlie2011-02-282-23/+32
| | | | We need this to do signed stuff for RGTC.
* st/mesa & v_bug_mgr: two small instanced drawing fixesChristian König2011-02-281-0/+2
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* intel: Use the current context rather than last bound context for a drawable.Eric Anholt2011-02-261-1/+2
| | | | | | | | If another thread bound a context to the drawable then unbound it, the driContextPriv would end up NULL. With the previous two fixes, this fixes glx-multithread-makecurrent-2, despite the issue not being about the multithreaded makecurrent.
* i965/fs: Initial plumbing to support TXD.Kenneth Graunke2011-02-252-0/+14
| | | | | This adds the opcode and the code to convert ir_txd to OPCODE_TXD; it doesn't actually add support yet.
* i965/fs: Complete TXL support on gen5+.Kenneth Graunke2011-02-251-0/+7
| | | | | Initial plumbing existed to turn the ir_txl into OPCODE_TXL, but it was never handled.
* i965/fs: Complete TXL support on gen4.Kenneth Graunke2011-02-251-0/+10
| | | | | Initial plumbing existed to turn the ir_txl into OPCODE_TXL, but it was never handled.
* i965/fs: Use a properly named constant in TXB handling.Kenneth Graunke2011-02-251-1/+1
| | | | | | | The old value, BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE makes it sound like we're doing a non-bias texture lookup. It has the same value as the new constant BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_BIAS_COMPARE, so there should be no functional changes.
* i965: Add #defines for gen4 SIMD8 TXB/TXL with shadow comparison.Kenneth Graunke2011-02-251-0/+2
| | | | From volume 4, page 161 of the public i965 documentation.
* gallium/st: place value check before value is useJerome Glisse2011-02-251-1/+1
| | | | | | 7.9 & 7.10 candidate Signed-off-by: Jerome Glisse <[email protected]>
* i965: Increase Sandybridge point size clamp in the clip state.Kenneth Graunke2011-02-241-1/+1
| | | | | | | | | 255.875 matches the hardware documentation. Presumably this was a typo. NOTE: This is a candidate for the 7.10 branch, along with commit 2bfc23fb86964e4153f57f2a56248760f6066033. Reviewed-by: Eric Anholt <[email protected]>
* intel: Try using glCopyTexSubImage2D in _mesa_meta_BlitFramebufferNeil Roberts2011-02-243-22/+108
| | | | | | | | | | | | | | | | In the case where glBlitFramebuffer is being used to copy to a texture without scaling it is faster if we can use the hardware to do a blit rather than having to do a texture render. In most of the drivers glCopyTexSubImage2D will use a blit so this patch makes it check for when glBlitFramebuffer is doing a simple copy and then divert to glCopyTexSubImage2D. This was originally proposed as an extension to the common meta-ops. However, it was rejected as using the BLT is only advantageous for Intel hardware. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=33934 Signed-off-by: Chris Wilson <[email protected]>
* i965: Remember to pack the constant blend color as floats into the batchChris Wilson2011-02-241-4/+4
| | | | | | | Fixes regression from aac120977d1ead319141d48d65c9bba626ec03b8. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34597 Signed-off-by: Chris Wilson <[email protected]>
* intel: Reset the buffer offset after releasing reference to packed uploadChris Wilson2011-02-242-58/+77
| | | | | | | Fixes oglc/vbo(basic.bufferdata) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34603 Signed-off-by: Chris Wilson <[email protected]>
* i965: Unmap the correct pointer after discontiguous uploadChris Wilson2011-02-241-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes piglit/fbo-depth-sample-compare: ==14722== Invalid free() / delete / delete[] ==14722== at 0x4C240FD: free (vg_replace_malloc.c:366) ==14722== by 0x84FBBFD: intel_upload_unmap (intel_buffer_objects.c:695) ==14722== by 0x85205BC: brw_prepare_vertices (brw_draw_upload.c:457) ==14722== by 0x852F975: brw_validate_state (brw_state_upload.c:394) ==14722== by 0x851FA24: brw_draw_prims (brw_draw.c:365) ==14722== by 0x85F2221: vbo_exec_vtx_flush (vbo_exec_draw.c:389) ==14722== by 0x85EF443: vbo_exec_FlushVertices_internal (vbo_exec_api.c:543) ==14722== by 0x85EF49B: vbo_exec_FlushVertices (vbo_exec_api.c:973) ==14722== by 0x86D6A16: _mesa_set_enable (enable.c:351) ==14722== by 0x42CAD1: render_to_fbo (in /home/ickle/git/piglit/bin/fbo-depth-sample-compare) ==14722== by 0x42CEE3: piglit_display (in /home/ickle/git/piglit/bin/fbo-depth-sample-compare) ==14722== by 0x42F508: display (in /home/ickle/git/piglit/bin/fbo-depth-sample-compare) ==14722== Address 0xc606310 is 0 bytes after a block of size 18,720 alloc'd ==14722== at 0x4C244E8: malloc (vg_replace_malloc.c:236) ==14722== by 0x85202AB: copy_array_to_vbo_array (brw_draw_upload.c:256) ==14722== by 0x85205BC: brw_prepare_vertices (brw_draw_upload.c:457) ==14722== by 0x852F975: brw_validate_state (brw_state_upload.c:394) ==14722== by 0x851FA24: brw_draw_prims (brw_draw.c:365) ==14722== by 0x85F2221: vbo_exec_vtx_flush (vbo_exec_draw.c:389) ==14722== by 0x85EF443: vbo_exec_FlushVertices_internal (vbo_exec_api.c:543) ==14722== by 0x85EF49B: vbo_exec_FlushVertices (vbo_exec_api.c:973) ==14722== by 0x86D6A16: _mesa_set_enable (enable.c:351) ==14722== by 0x42CAD1: render_to_fbo (in /home/ickle/git/piglit/bin/fbo-depth-sample-compare) ==14722== by 0x42CEE3: piglit_display (in /home/ickle/git/piglit/bin/fbo-depth-sample-compare) ==14722== by 0x42F508: display (in /home/ickle/git/piglit/bin/fbo-depth-sample-compare) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34604 Signed-off-by: Chris Wilson <[email protected]>
* intel: Protect against waiting on a NULL render target boChris Wilson2011-02-241-1/+1
| | | | | | | | | | If we fall back to software rendering due to the render target being absent (GPU hang or other error in creating the named target), then we do not need to nor should we wait upon the results. Reported-by: Magnus Kessler <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34656 Signed-off-by: Chris Wilson <[email protected]>
* st/mesa: treat 1D ARRAY upload like a depth or 2D array upload.Dave Airlie2011-02-241-0/+12
| | | | | | | | | | | | | This is because the HW doesn't always store a 1D array like a 2D texture, it more likely stores it like 2D texture (i.e. alignments etc). This means we upload each slice separately and let the driver work out where to put it. this might break nvc0 as I can't test it, I have only nv50 here. Signed-off-by: Dave Airlie <[email protected]>
* intel: gen3 is particular sensitive to batch sizeChris Wilson2011-02-231-1/+1
| | | | | | | | | | | ... and prefers a small batch whereas gen4+ prefer a large batch to carry more state. Tuning using openarena/padman indicate that a batch size of just 4096 is best for those cases. Bugzilla: https://bugs.freedesktop.org/process_bug.cgi Signed-off-by: Chris Wilson <[email protected]>
* i915: And remember assign the new value to the state reg...Chris Wilson2011-02-231-0/+1
| | | | | | | Fixes regression from 298ebb78de8a6b6edf0aa0fe8d784d00bbc2930e. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34589 Signed-off-by: Chris Wilson <[email protected]>
* st/mesa: fix computing the lowest address for interleaved attribsWiktor Janas2011-02-231-3/+6
| | | | | | | | | Ptr can be very well NULL, so when there are two arrays, with one having offset 0 (and thus NULL Ptr), and the other having a non-zero offset, the non-zero value is taken as minimum (because of !low_addr ? start ...). On 32-bit systems, this somehow works. On 64-bit systems, it leads to crashes. Signed-off-by: Marek Olšák <[email protected]>
* vbo: added vbo_check_buffers_are_unmapped() debug functionBrian Paul2011-02-222-0/+19
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* vbo: removed unused #defines, add commentsBrian Paul2011-02-221-3/+6
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* mesa: move comment, change debug codeBrian Paul2011-02-221-3/+5
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* vbo: simplify NeedFlush flag clearingBrian Paul2011-02-221-4/+1
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