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* st/mesa: fix glReadBuffer(GL_NONE) segfaultBrian Paul2014-01-231-1/+2
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73956 Cc: 10.0 <[email protected]> Tested-by: Ahmed Allam <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* driconf: Add Catalan translationsAlex Henrie2014-01-232-1/+322
| | | | | | See the instructions in Makefile.am under "Adding new translations". Reviewed-by: Eric Anholt <[email protected]>
* driconf: Correct and update Spanish translationsAlex Henrie2014-01-231-31/+33
| | | | Reviewed-by: Eric Anholt <[email protected]>
* driconf: Synchronize po filesAlex Henrie2014-01-235-357/+702
| | | | | | | See the instructions in Makefile.am under "Updating existing translations". Reviewed-by: Eric Anholt <[email protected]>
* mesa: Set gl_constants::MinMapBufferAlignmentIan Romanick2014-01-231-0/+1
| | | | | | | | | | | | Leaving it set to zero isn't really correct since every allocation has at least an alignment of 1 byte. It also caused a problem in the i965 driver after I removed the MAX(64, ...) from the alignment calculation. That's what I get for changing a patch without retesting it. :( Signed-off-by: Ian Romanick <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73907 Reviewed-by: Kenneth Graunke <[email protected]> Cc: Lu Hua <[email protected]>
* radeon / r200: Eliminate BEGIN_BATCH_NO_AUTOSTATEIan Romanick2014-01-2311-32/+27
| | | | | | | | | | | | | | Sed job: grep -lr BEGIN_BATCH_NO_AUTOSTATE src/mesa/drivers/dri/ | while read f do cat $f | sed 's/BEGIN_BATCH_NO_AUTOSTATE/BEGIN_BATCH/g' > x mv x $f done Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Cc: Marek Olšák <[email protected]>
* radeon / r200: Remove unused 'dostate' parameterIan Romanick2014-01-232-4/+2
| | | | | | | | | | | | | | This parameter hasn't been used since January 2010 (commit 29e02c7). Fixes the following warning in both radeon and r200: radeon_common.c: In function 'r200_rcommonBeginBatch': radeon_common.c:762:14: warning: unused parameter 'dostate' [-Wunused-parameter] Note that now BEGIN_BATCH and BEGIN_PATCH_NO_AUTOSTATE are identical. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Cc: Marek Olšák <[email protected]>
* radeon / r200: Fix 'empty body' warningIan Romanick2014-01-231-2/+2
| | | | | | | | | radeon_common.c: In function 'radeon_draw_buffer': radeon_common.c:237:3: warning: suggest braces around empty body in an 'if' statement [-Wempty-body] Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Cc: Marek Olšák <[email protected]>
* radeon / r200: Fix incompatible pointer type warningIan Romanick2014-01-231-2/+1
| | | | | | | | | | | | | | | | | When parameters were removed from dd_function_table::Viewport (commit 065bd6ff), radeon_viewport (in both radeon and r200) started generating a warning. radeon_common.c: In function 'r200_radeon_viewport': radeon_common.c:415:15: warning: assignment from incompatible pointer type [enabled by default] radeon_common.c:419:23: warning: assignment from incompatible pointer type [enabled by default] I didn't notice this initially, and it's harmless because the function is never called through the incorrectly typed pointer. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Cc: Marek Olšák <[email protected]>
* mesa: whitespace fixes in glformats.cBrian Paul2014-01-231-75/+51
| | | | | | | Reindent _mesa_get_nongeneric_internalformat() to match other functions. Remove extraneous empty lines in _mesa_get_linear_internalformat(). Trivial.
* mesa: rename unbind_texobj_from_imgunits()Brian Paul2014-01-231-4/+4
| | | | | | | ... to unbind_texobj_from_image_units() and change a local var's type to silence an MSVC warning. Reviewed-by: Marek Olšák <[email protected]>
* mesa: initialize "is_layered" variable to silence warningBrian Paul2014-01-231-1/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: fix/add some cases in _mesa_get_linear_internalformat()Brian Paul2014-01-231-1/+7
| | | | | | | | In some cases we were converting generic formats to sized formats and vice versa. The point is to simply convert sRGB formats to corresponding linear formats. Reviewed-by: Marek Olšák <[email protected]>
* mesa: add missing ETC2_SRGB cases in formats.cBrian Paul2014-01-231-0/+12
| | | | | | | In the _mesa_get_format_color_encoding() and _mesa_get_srgb_format_linear() functions. Reviewed-by: Marek Olšák <[email protected]>
* mesa: Add ARB_arrays_of_arraysTimothy Arceri2014-01-232-0/+2
| | | | | Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: switch eu-emitter to use FS IR and fs_generatorTopi Pohjolainen2014-01-233-120/+84
| | | | | | | | | | | | | | | | | | No regressions on IVB (piglit quick + unit tests). v2 (Paul): - no need to patch the unit tests anymore. Original logic was altered and unit tests updated to match the fs-generator - lrp emission moves from the blorp compiler core into the emitter here (previously there was a separate refactoring patch which is not really needed anymore as the lrp logic got refactored when the original lrp logic got fixed). - pass 'BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX' to the generator in fs_inst::target instead of hardcoding it Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/fs: add support for BRW_OPCODE_AVG in fs_generatorTopi Pohjolainen2014-01-231-0/+3
| | | | | | | Needed for compiling blorp blit programs. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/fs: introduce blorp specific rt-write for fs_generatorTopi Pohjolainen2014-01-234-0/+23
| | | | | | | | | | | | | | | | | The compiler for blorp programs likes to emit instructions for the message construction itself meaning that the generator needs to skip any such when blorp programs are translated for the hw. In addition, the binding table control is special for blorp programs and the generator does not need to update the binding tables associated with the compiler bookkeeping (this in fact gets thrown away as the blorp compiler sets the program data in its own way). v2 (Paul): do not hardcode the binding table index but use fs_inst::target instead. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/fs: allow unit tests to dump the final patched assemblyTopi Pohjolainen2014-01-232-8/+10
| | | | | | | | | | | | | | Unit tests comparing generated blorp programs to known good need to have the dump in designated file instead of in default standard output. The comparison also expects the jump counters of if-else-instructions to be correctly set and hence the dump needs to be taken _after_ 'patch_IF_ELSE()' is run (the default dump of the fs_generator does this before). v2 (Paul): dropped the redundant 'dump_enabled' argument Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap brw_IF/ELSE/ENDIF() into eu-emitterTopi Pohjolainen2014-01-232-9/+23
| | | | | | | v2 (Paul): renamed emit_if() to emit_cmp_if() Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap RNDD (/brw_RNDD(&func, /emit_rndd(/)Topi Pohjolainen2014-01-232-2/+8
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap FRC (/brw_FRC(&func, /emit_frc(/)Topi Pohjolainen2014-01-232-4/+10
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap MUL (/brw_MUL(&func, /emit_mul(/)Topi Pohjolainen2014-01-232-9/+16
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap OR (/brw_OR(&func, /emit_or(/)Topi Pohjolainen2014-01-232-24/+31
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap SHL (/brw_SHL(&func, /emit_shl(/)Topi Pohjolainen2014-01-232-12/+19
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap SHR (/brw_SHR(&func, /emit_shr(/)Topi Pohjolainen2014-01-232-12/+19
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap ADD (/brw_ADD(&func, /emit_add(/)Topi Pohjolainen2014-01-232-18/+32
| | | | | | | | In addition, the special case requiring explicit execution size control is wrapped manually. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap AND (/brw_AND(&func, /emit_and(/)Topi Pohjolainen2014-01-232-39/+46
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap MOV (/brw_MOV(&func, /emit_mov(/)Topi Pohjolainen2014-01-232-35/+45
| | | | | | | | In addition, the two special cases requiring explicit execution size control are wrapped manually. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap emission of if-equal-assignmentTopi Pohjolainen2014-01-232-24/+12
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap emission of conditional assignmentTopi Pohjolainen2014-01-232-15/+15
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: move emission of sample combining into eu-emitterTopi Pohjolainen2014-01-233-9/+24
| | | | | | | | | v2 (Paul): pass the combining opcode as an argument to emit_combine(). This keeps manual_blend_average() selfcontained documentation wise. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: move emission of rt-write into eu-emitterTopi Pohjolainen2014-01-233-10/+28
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: move emission of texture lookup into eu-emitterTopi Pohjolainen2014-01-233-22/+60
| | | | | | | | | | | Resolving of the hardware message type is moved into the emitter also in preparation for switching to use fs_generator. The generator wants to translate the high level op-code into the message type and hence the emitter needs to know the original op-code. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/fs: introduce non-compressed equivalent of tex_cmsTopi Pohjolainen2014-01-234-0/+13
| | | | | | | v2: introduces 'SHADER_OPCODE_TXF_UMS' also for gen8 Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: rename tex_ms to tex_cmsTopi Pohjolainen2014-01-2310-17/+17
| | | | | | | | | | Prepares for the introduction of non-compressed multi-sampled lookup used in the blorp programs. v2: now also taking into account gen8 Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: move emission of pixel kill into eu-emitterTopi Pohjolainen2014-01-233-25/+38
| | | | | | | | | The combination of four separate comparison operations and and the masked "and" require special treatment when moving to FS LIR. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: introduce separate eu-emitter for blit compilerTopi Pohjolainen2014-01-234-38/+113
| | | | | | | | | | | | Prepares for presenting blorp blit programs using FS IR that allows EU-assembly generation using i965 glsl-compiler backend (fs_generator). v2: rebased on top of endif-jump counter fix (moving the added brw_set_uip_jip() into the emitter) Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: Support 32 texture image units on Haswell+.Kenneth Graunke2014-01-222-4/+7
| | | | | | | | | | | | | | | | | | | | The Intel closed source OpenGL driver recently began supporting 32 texture image units on Haswell. This makes the open source driver support 32 as well. Earlier generations don't have the message header field required to support more than 16 sampler states, so we continue to advertise 16 there. On Haswell, this causes us to advertise: - GL_MAX_TEXTURE_IMAGE_UNITS = 32 - GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS = 32 - GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS = 96 instead of the old values of 16, 16, and 48. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Switch from BRW_MAX_TEX_UNIT to the actual limit.Kenneth Graunke2014-01-221-1/+2
| | | | | | | | | | BRW_MAX_TEX_UNIT is about to grow, but only Gen7+ will be able to support the new larger value. On older platforms, we don't want to allocate the extra space - it would just be a waste. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* mesa: Bump MAX_TEXTURE_IMAGE_UNITS to 32.Kenneth Graunke2014-01-221-1/+1
| | | | | | | | This allows drivers to optionally support more than 16 texture units. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/vec4: Support arbitrarily large sampler state indices on Haswell+.Kenneth Graunke2014-01-222-3/+26
| | | | | | | | | | Like the scalar backend, we add an offset to the "Sampler State Pointer" field to select a group of 16 samplers, then use the "Sampler Index" field to select within that group. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/vec4: Refactor sampler message setup.Kenneth Graunke2014-01-221-17/+22
| | | | | | | | | | The next patch adds an additional case where the message header is necessary. So we want to do the g0 copy if inst->header_present is set, rather than inst->texture_offset. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/vec4: Don't set header_present if texel offsets are all 0.Kenneth Graunke2014-01-221-9/+8
| | | | | | | | | | | | | | In theory, a shader might use textureOffset() but set all the texel offsets to zero. In that case, we don't actually need to set up the message header - zero is the implicit default. By moving the texture_offset setup before the header_present setup, we can easily only set header_present when there are non-zero texel offset values. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Support arbitrarily large sampler state indices on Haswell+.Kenneth Graunke2014-01-222-2/+22
| | | | | | | | | | | | | | | | | The message descriptor's "Sampler Index" field is only 4 bits (on all generations of hardware), so it can only represent indices 0 through 15. Haswell introduced a new field in the message header - "Sampler State Pointer". Normally, this is copied straight from g0, but we can also add a byte offset (as long as it's a multiple of 32). This patch uses a "Sampler State Pointer" offset to select a group of 16 sampler states, and then uses the "Sampler Index" field to select the state within that group. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Plumb sampler index into emit_texture_gen7.Kenneth Graunke2014-01-223-4/+4
| | | | | | | | We'll need this in the next patch. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Refactor sampler message header to duplicate less code.Kenneth Graunke2014-01-221-25/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, the code to copy g0 to the message header existed in two places - one for the texture offset case, and one for any other case. By treating texture_offset as a special case of header_present, we can remove this duplication and shorten the code. Future patches which add new header fields also won't have to add additional duplication. This also clarifies a confusing construct. The old code contained: } else if (inst->header_present) { if (brw->gen >= 7) { ...explicit copy from g0 to the message header... } else { /* Set up an implied move from g0 to the MRF. */ } } This looks like it might set up an implied move on Sandybridge, which doesn't support those. However, Sandybridge only uses a message header for texture offsets, so it would never hit this code path. The new code avoids this implicit knowledge by only setting up an implied move on Gen4-5. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Use get_element_ud to shorten texture header access.Kenneth Graunke2014-01-221-2/+1
| | | | | | | | This is shorter, easier to read, and further from the 80 column limit. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* intel: Fix initial MakeCurrent for single-buffer drawablesKristian Høgsberg2014-01-221-6/+4
| | | | | | | | | | | | | | | Commit 05da4a7a5e7d5bd988cb31f94ed8e1f053d9ee39 attempts to eliminate the call to intel_update_renderbuffer() in the case where we already have a drawbuffer for the drawable. Unfortunately this only checks the back left renderbuffer, which breaks in case of single buffer drawables. This means that the initial viewport will not be set in that case. Instead, we now check whether the initial viewport has not been set, in which case we call out to intel_update_renderbuffer(). https://bugs.freedesktop.org/show_bug.cgi?id=73862 Signed-off-by: Kristian Høgsberg <[email protected]>
* meta: Move loop variable declaration outside loop.Vinson Lee2014-01-211-1/+3
| | | | | | | | | | | | | | | | Fixes MSVC build error introduced with commit 69b258cb4636315b4c1aaaceeedd1eed8af98ba8. meta.c(618) : error C2143: syntax error : missing ';' before 'type' meta.c(618) : error C2143: syntax error : missing ')' before 'type' meta.c(618) : error C2065: 'i' : undeclared identifier meta.c(618) : warning C4552: '<' : operator has no effect; expected operator with side-effect meta.c(618) : error C2059: syntax error : ')' meta.c(618) : error C2143: syntax error : missing ';' before '{' meta.c(619) : error C2065: 'i' : undeclared identifier meta.c(620) : error C2065: 'i' : undeclared identifier Signed-off-by: Vinson Lee <[email protected]>
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