aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/program
Commit message (Collapse)AuthorAgeFilesLines
* mesa: test against MaxUniformComponents in check_resources()Brian Paul2011-03-111-3/+3
| | | | | | Since we're compiling/linking GLSL shaders we should check against the shader uniform limits, not the legacy vertex/fragment program parameter limits which are usually lower.
* mesa: move location of some geometry program limitsBrian Paul2011-03-111-1/+1
| | | | | | | The gl_program_constants struct is for limits that are applicable to any/all shader stages. Move the geometry shader-only fields into the gl_constants struct. Remove redundant MaxGeometryUniformComponents field too.
* mesa: use check_resources() to check program against limitsBrian Paul2011-03-111-0/+58
| | | | | | Without these checks we could create shaders with more samplers, constants than the driver could handle. Fail linking rather than dying later.
* mesa: added gl_program_constants::MaxAddressOffsetBrian Paul2011-03-022-2/+5
| | | | See https://bugs.freedesktop.org/show_bug.cgi?id=29418
* mesa: increase INST_INDEX_BITS to 12Brian Paul2011-03-021-1/+1
| | | | For more info see fd.o bug 29418.
* mesa: Fix build breakage caused by c73e6ceIan Romanick2011-03-011-7/+0
|
* Add generated parser / lexer files to gitignore listsIan Romanick2011-03-011-0/+3
|
* mesa: Remove files generated by flex and bison from GITIan Romanick2011-03-013-9620/+0
| | | | These files were for the ARB_vertex_program / ARB_fragement_program assembler.
* Use C-style system headers in C++ code to avoid issues with std:: namespaceIan Romanick2011-02-211-1/+0
|
* mesa: Do copy propagation across if-else-endif.José Fonseca2011-02-171-2/+28
| | | | | | | | Addresses excessive TEMP allocation in vertex shaders where all CONSTs are stored into TEMPS at the start, but copy propagation was failing due to the presence of IFs. We could do something about loops, but ifs are easy enough.
* ir_to_mesa: Don't dereference a NULL pointer during copy propagationIan Romanick2011-02-111-0/+3
| | | | | | The ACP may already be NULL, so don't try to make it NULL again. This should fix bugzilla #34119.
* mesa: Fix the Mesa IR copy propagation to not read past writes to the reg.Eric Anholt2011-02-081-7/+40
| | | | | | Fixes glsl-vs-post-increment-01. Reviewed-by: José Fonseca <[email protected]>
* Convert everything from the talloc API to the ralloc API.Kenneth Graunke2011-01-313-52/+47
|
* glsl: use 'this' pointer to be consistentBrian Paul2011-01-261-1/+1
|
* glsl: remove needless conditionalBrian Paul2011-01-261-14/+10
|
* glsl: move ir_var_out codeBrian Paul2011-01-261-7/+7
|
* glsl: move ir_var_system_value codeBrian Paul2011-01-261-5/+5
|
* glsl: use local var to simplify code a bitBrian Paul2011-01-261-22/+23
|
* mesa: Propagate gl_FragDepth layout from GLSL IR to Mesa IRChad Versace2011-01-261-0/+23
|
* ir_to_mesa: Add several assertions about sizes of arraysIan Romanick2011-01-251-0/+4
| | | | | Both of these assertions are triggered by the test case in bugzilla size of 0.
* ra: Use the same context when realloc'ing arrays.Kenneth Graunke2011-01-211-2/+2
| | | | | | The original allocations use regs->regs as the context, so talloc will happily ignore the context given here. Change it to match to clarify that it isn't changing.
* ra: Take advantage of the adjacency list in finding a node to spill.Eric Anholt2011-01-181-6/+6
| | | | | | | | This revealed a bug in ra_get_spill_benefit where we only considered the benefit of the first adjacency we were to remove, explaining some of the ugly spilling I've seen in shaders. Because of the reduced spilling, it reduces the runtime of glsl-fs-convolution-1 36.9% +/- 0.9% (n=5).
* ra: Remove unused "name" field in regs.Eric Anholt2011-01-181-1/+0
|
* ra: Take advantage of the adjacency list in ra_select() too.Eric Anholt2011-01-181-5/+6
| | | | Reduces runtime of glsl-fs-convolution-1 another 13.9% +/- 0.6% (n=5).
* ra: Add an adjacency list to trade space for time in ra_simplify().Eric Anholt2011-01-181-14/+21
| | | | | | This was recommended in the original paper, but I figued "make it run" before "make it fast". Now we make it fast. Reduces the runtime of glsl-fs-convolution-1 by 12.7% +/- 0.6% (n=5).
* ra: Trade off some space to get time efficiency in ra_set_finalize().Eric Anholt2011-01-181-6/+32
| | | | | | | | | | | | | | | | | Our use of the register allocator in i965 is somewhat unusual. Whereas most architectures would have a smaller set of registers with fewer register classes and reuse that across compilation, we have 1, 2, and 4-register classes (usually) and a variable number up to 128 registers per compile depending on how many setup parameters and push constants are present. As a result, when compiling large numbers of programs (as with glean texCombine going through ff_fragment_shader), we spent much of our CPU time in computing the q[] array. By keeping a separate list of what the conflicts are for a particular reg, we reduce glean texCombine time 17.0% +/- 2.3% (n=5). We don't expect this optimization to be useful for 915, which will have a constant register set, but it would be useful if we were switch to this register allocator for Mesa IR.
* Merge branch 'draw-instanced'Brian Paul2011-01-154-0/+15
|\ | | | | | | | | | | | | | | Conflicts: src/gallium/auxiliary/draw/draw_llvm.c src/gallium/drivers/llvmpipe/lp_state_fs.c src/glsl/ir_set_program_inouts.cpp src/mesa/tnl/t_vb_program.c
| * mesa: implement system values in program interpreterBrian Paul2010-12-102-0/+5
| |
| * mesa: ir_to_mesa support for system valuesBrian Paul2010-12-081-0/+5
| |
| * mesa: program printing for PROGRAM_SYSTEM_VALUEBrian Paul2010-12-081-0/+5
| |
* | ir_to_mesa: Fix segfaults on ir_to_mesa invocation after MSVC change.Eric Anholt2011-01-141-6/+6
| |
* | mesa: Dynamically allocate acp array in ir_to_mesa_visitor::copy_propagate.Vinson Lee2011-01-141-2/+4
| | | | | | | | | | | | | | | | | | | | Fixes these MSVC errors. ir_to_mesa.cpp(2644) : error C2057: expected constant expression ir_to_mesa.cpp(2644) : error C2466: cannot allocate an array of constant size 0 ir_to_mesa.cpp(2644) : error C2133: 'acp' : unknown size ir_to_mesa.cpp(2646) : error C2070: 'ir_to_mesa_instruction *[]': illegal sizeof operand ir_to_mesa.cpp(2709) : error C2070: 'ir_to_mesa_instruction *[]': illegal sizeof operand ir_to_mesa.cpp(2718) : error C2070: 'ir_to_mesa_instruction *[]': illegal sizeof operand
* | mesa: Add channel-wise copy propagation to ir_to_mesa.Eric Anholt2011-01-141-0/+129
| | | | | | | | | | | | | | | | This catches more opportunities than the prog_optimize.c code on openarena's fixed function shaders turned to GLSL, mostly due to looking at multiple source instructions for copy propagation opportunities. It should also be much more CPU efficient than prog_optimize.c's code.
* | mesa: Include mfeatures.h in program.c.Vinson Lee2011-01-091-0/+1
| | | | | | | | Include mfeatures.h for feature tests.
* | glsl: Support if-flattening beyond a given maximum nesting depth.Kenneth Graunke2010-12-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | This adds a new optional max_depth parameter (defaulting to 0) to lower_if_to_cond_assign, and makes the pass only flatten if-statements nested deeper than that. By default, all if-statements will be flattened, just like before. This patch also renames do_if_to_cond_assign to lower_if_to_cond_assign, to match the new naming conventions.
* | mesa: Clean up header file inclusion in prog_statevars.h.Vinson Lee2010-12-181-1/+3
| |
* | mesa: more program debug codeBrian Paul2010-12-141-0/+12
| |
* | mesa: Clean up header file inclusion in prog_optimize.h.Vinson Lee2010-12-141-1/+2
| |
* | mesa: Clean up header file inclusion in prog_cache.h.Vinson Lee2010-12-141-1/+2
| |
* | mesa: Clean up header file inclusion in nvvertparse.h.Vinson Lee2010-12-141-1/+4
| |
* | ir_to_mesa: Don't generate swizzles for record derefs of non-scalar/vectorsIan Romanick2010-12-131-1/+7
| | | | | | | | | | | | | | | | This is the same as what the array dereference handler does. Fixes piglit test glsl-link-struct-array (bugzilla #31648). NOTE: This is a candidate for the 7.9 and 7.10 branches.
* | mesa: Clean up header file inclusion in nvfragparse.h.Vinson Lee2010-12-111-1/+4
| |
* | mesa: Clean up header file inclusion in ir_to_mesa.h.Vinson Lee2010-12-111-2/+5
| |
* | mesa: Clean up header file inclusion in arbprogparse.h.Vinson Lee2010-12-091-1/+5
| |
* | symbol_table: Add support for adding a symbol at top-level/global scope.Kenneth Graunke2010-12-062-5/+84
| |
* | mesa: Bump the number of bits in the register index.José Fonseca2010-12-061-1/+1
| | | | | | | | | | | | More than 1023 temporaries were being used for a Cinebench shader before doing temporary optimization, causing the index value to wrap around to -1024.
* | mesa: update comments, remove dead codeBrian Paul2010-12-031-3/+3
| |
* | mesa: remove unneeded castBrian Paul2010-12-031-1/+1
| |
* | mesa, st/mesa: fix gl_FragCoord with FBOs in GalliumMarek Olšák2010-12-032-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gl_FragCoord.y needs to be flipped upside down if a FBO is bound. This fixes: - piglit/fbo-fragcoord - https://bugs.freedesktop.org/show_bug.cgi?id=29420 Here I add a new program state STATE_FB_WPOS_Y_TRANSFORM, which is set based on whether a FBO is bound. The state contains a pair of transformations. It can be either (XY=identity, ZW=transformY) if a FBO is bound, or (XY=transformY, ZW=identity) otherwise, where identity = (1, 0), transformY = (-1, height-1). A classic driver (or st/mesa) may, based on some other state, choose whether to use XY or ZW, thus negate the conditional "if (is a FBO bound) ...". The reason for this is that a Gallium driver is allowed to only support WPOS relative to either the lower left or the upper left corner, so we must flip the Y axis accordingly again. (the "invert" parameter in emit_wpos_inversion) NOTE: This is a candidate for the 7.9 branch. Signed-off-by: Marek Olšák <[email protected]> Signed-off-by: Brian Paul <[email protected]>
* | glsl: Lower ir_binop_pow to a sequence of EXP2 and LOG2Ian Romanick2010-12-011-2/+3
| |