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* mesa: include stdbool.h in register_allocate.h to fix buildBrian Paul2014-03-181-0/+2
| | | | https://bugs.freedesktop.org/show_bug.cgi?id=76331
* ra: Use bool instead of GLboolean.Kenneth Graunke2014-03-181-3/+3
| | | | | | | | | | | | | | | | | | | This isn't the GL API, so there's no reason to use GLboolean. Using bool is safer: any non-zero value is treated as "true". When converting a value to a GLboolean, all but the low byte is discarded, which means that values like 256 will be incorrectly rendered as false. Done via the following vim commands: :%s/GLboolean/bool/g :%s/GL_TRUE/true/g :%s/GL_FALSE/false/g and one line of manual whitespace tidying. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965: Ask the register allocator to round-robin through registers.Eric Anholt2013-04-041-0/+1
| | | | | | | | | | | | The way we were allocating registers before, packing into low register numbers for Ironlake, resulted in an overly-constrained dependency graph for instruction scheduling. Improves GLBenchmark 2.1 performance by 4.5% +/- 0.7% (n=26). No difference on my old GLSL demo (n=20). No difference on nexuiz (n=15). v2: Fix off-by-one bug that made the change only work for 16-wide on i965. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* ra: Add q_values parameter to ra_set_finalize()Tom Stellard2012-09-191-1/+3
| | | | | | This allows the user to pass precomputed q values to the allocator. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Make the register allocator allocation take a ralloc context.Eric Anholt2012-01-181-1/+1
| | | | | | This fixes a memory leak on i965 context destruction. NOTE: This is a candidate for the 8.0 branch.
* mesa: Add a convenience interface for register allocator conflicts setup.Eric Anholt2011-08-101-0/+2
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* ra: Add ra_set_node_reg()Tom Stellard2011-04-301-0/+1
| | | | | | | | This function can be used to avoid creating single register classes for input/payload registers. This makes optimistic coloring less likely to fail. Reviewed-by: Eric Anholt <[email protected]>
* i965: Add support for register spilling.Eric Anholt2010-10-211-0/+2
| | | | | It can be tested with if (0) replaced with if (1) to force spilling for all virtual GRFs. Some simple tests work, but large texturing tests fail.
* ra: First cut at a graph-coloring register allocator for mesa.Eric Anholt2010-09-291-0/+69
Notably missing is choice of registers to spill.