| Commit message (Collapse) | Author | Age | Files | Lines |
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Reviewed-by: Brian Paul <[email protected]>
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v2: Remove dead positive() function, caught by Matt.
Reviewed-by: Brian Paul <[email protected]> (v1)
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This patch has been generated by the following Coccinelle semantic
patch:
// Don't cast the return value of malloc/realloc.
//
// Casting the return value of malloc/realloc only stands to hide
// errors.
@@
type T;
expression E1, E2;
@@
- (T)
(
_mesa_align_calloc(E1, E2)
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_mesa_align_malloc(E1, E2)
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calloc(E1, E2)
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malloc(E1)
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realloc(E1, E2)
)
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This cleans up some code generated by the IR-to-Mesa pass for i915.
In particular, some shaders involving arrays of constant matrices
result in really bad code.
v2: Silence several warnings from merging the gl_constant_value work.
Fix DP[23] folding. Add support for a bunch more opcodes that appear
in piglit runs on i915.
Reviewed-by: Eric Anholt <[email protected]>
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This fixes the remaining regression from ff_fragment_shader in Mesa IR
instruction count, to now being a 1.9% win overall.
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Leaving the unused registers with other values caused assertion
failures and other problems in places that blindly iterate over all
sources.
brw_vs_emit.c:1381: get_src_reg: Assertion `c->regs[file][index].nr !=
0' failed.
Fixes i965 piglit:
vs-uniform-array-mat[234]-col-row-rd
vs-uniform-array-mat[234]-index-col-row-rd
vs-uniform-array-mat[234]-index-row-rd
vs-uniform-mat[234]-col-row-rd
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
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This pass coverts CMP T0, T1 T2 T0 -> MOV T0, T2 when the CMP
instruction is the first instruction to write to register T0.
This pass is useful for hardware that requires a lot of lowering passes
that generate many CMP instructions.
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Reviewed-by: Eric Anholt <[email protected]>
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Registers that are used inside of loops need to be considered live
starting with the first instruction of the outermost loop.
https://bugs.freedesktop.org/show_bug.cgi?id=34370
NOTE: This is a candidate for the 7.9 and 7.10 branches.
Reviewed-by: Eric Anholt <[email protected]>
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In one optimization pass, register files may have been messed therefore
merging instructions which use the same index in two different register
files.
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Conflicts:
src/mesa/program/prog_optimize.c
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This gets glsl-vs-raytrace, glsl-fs-raytrace running on the new
compiler.
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This pulls in multiple i965 driver fixes which will help ensure better
testing coverage during development, and also gets past the conflicts
of the src/mesa/shader -> src/mesa/program move.
Conflicts:
src/mesa/Makefile
src/mesa/main/shaderapi.c
src/mesa/main/shaderobj.h
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This is the patch from Benjamin's Aug 11, 2010 email with minor fixes
(such as moving declarations before code)
Signed-off-by: Brian Paul <[email protected]>
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