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* r600: visual depth has no meaning here.Dave Airlie2009-09-031-12/+2
| | | | fbos get angry when this happens.
* r600: make sure the active shader bo is re-added to persistent list.Dave Airlie2009-09-031-0/+8
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* radeon: pass internal format into the miptree.Dave Airlie2009-09-033-11/+14
| | | | | | | We need to figure out if the compression format changes. without this texcmp segfaults if you change format enough times.
* radeon/dri2: add gl20 bits for r300/r600 just like dri1 doesDave Airlie2009-09-031-0/+2
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* Revert "i965: Use VBOs in the VBO module on 965, now that we have ↵Eric Anholt2009-09-021-2/+0
| | | | | | | | | | ARB_map_buffer_range." This reverts commit 00413d87426f14df47d90ba3c995e1889e9f88ca. Even with fixes, using ARB_map_buffer_range in the VBO module isn't showing up as a significant win, and some cases apparently regressed. Bug #23624.
* intel: Add support for FlushMappedBufferRange for ARB_map_buffer_range.Eric Anholt2009-09-022-15/+59
| | | | | | This should help for the usage by the VBO module, where we would upload the whole remaining chunk of the buffer for a series of range maps that should cover just a segment of it.
* intel: Sync a synchronized READ_BIT map buffer range with GL drawing to it.Eric Anholt2009-09-021-1/+1
| | | | It's probably uncommon, but would obviously have gone wrong.
* intel: Move MapBufferRange mesa state setting up to cover the 915 case.Eric Anholt2009-09-021-7/+7
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* i965: CS FENCE in URB_FENCE is 11-bits wideXiang, Haihao2009-09-021-2/+2
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* i965: validate sf stateXiang, Haihao2009-09-021-0/+1
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* intel: use _mesa_expand_bitmap() to skip an intermediate bufferBrian Paul2009-09-011-21/+6
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* dri: remove unused meta_clear_tris()Brian Paul2009-09-012-266/+2
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* intel: use BUFFER_BITS_COLORBrian Paul2009-09-011-1/+1
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* intel: fix incorrect parameter type for intel_bufferobj_map_range()Brian Paul2009-09-011-1/+1
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* radeon: trim down #includesBrian Paul2009-09-011-28/+0
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* radeon: use _mesa_meta_clear()Brian Paul2009-09-011-2/+2
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* mesa: obey stencil write mask in _mesa_meta_draw_pixels()Brian Paul2009-09-011-6/+8
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* intel: set Length/Offset fields in intel_bufferobj_map()Brian Paul2009-09-011-0/+3
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* intel: use _mesa_meta_copy_pixels() when do_blit_copypixels() failsBrian Paul2009-09-011-5/+1
| | | | Also, trim down #includes.
* intel: trim down #includesBrian Paul2009-09-011-8/+0
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* intel: use _mesa_meta_draw_pixels()Brian Paul2009-09-011-147/+4
| | | | | The textured quad path is slightly faster and will work with POT textures on i945.
* intel: trim down #includesBrian Paul2009-09-011-17/+0
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* intel: use _mesa_meta_clear(), it's a bit fasterBrian Paul2009-09-011-1/+2
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* radeon: Fix OQ to set ful lstate as dirty too.Pauli Nieminen2009-09-021-0/+1
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* radeon: Fix debug output to filter out less critical messages instead of ↵Pauli Nieminen2009-09-021-1/+1
| | | | more critical.
* radeon: fix r100/r200 polygon stipple under kmsDave Airlie2009-09-018-29/+62
| | | | | | | | There really need to use state emits under kms, otherwise we end up with some dwords in the command buffer before we've ever emitted any useful state. Signed-off-by: Dave Airlie <[email protected]>
* r100: fixup cubemap domainsDave Airlie2009-09-011-1/+1
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* xlib: plug in more meta functions, if TEST_META_FUNCS is setBrian Paul2009-08-311-13/+15
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* mesa: implement GL_DEPTH_BUFFER_BIT for _mesa_meta_blit_framebuffer()Brian Paul2009-08-312-25/+96
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* mesa: disable another debug testBrian Paul2009-08-311-1/+1
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* mesa: make verts[] arrays local varsBrian Paul2009-08-311-101/+98
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* r200: emit cube for kms correctly + fix tex emit resetDave Airlie2009-09-012-2/+4
| | | | CS checker found some issues.
* xlib: option to enable/test meta functions (disabled)Brian Paul2009-08-313-4/+22
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* mesa: implement depth/stencil formats for meta glDrawPixelsBrian Paul2009-08-311-34/+229
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* mesa: remove accidentally commited debug/disabled codeBrian Paul2009-08-311-2/+2
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* r300/compiler: fix warning due to no newlineDave Airlie2009-09-011-1/+2
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* r200: emit max vtx info for index buffer.Dave Airlie2009-09-013-0/+12
| | | | We need this for the CS bounds checking.
* radeon: Fix null pointer reference in debug system if no context is bind.Pauli Nieminen2009-09-011-3/+6
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* r600: Add more trace debug output to rendering pipeline.Pauli Nieminen2009-08-311-0/+10
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* radeon: Add support for indenting debug output.Pauli Nieminen2009-08-315-3/+67
| | | | Indetion can be used to make it easier to read debug code when sections of debug output are indented.
* radeon: Add comment warning about not choosing critical debug level.Pauli Nieminen2009-08-311-0/+3
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* radeon: Change default debug level to verbose.Pauli Nieminen2009-08-311-1/+1
| | | | Verbose is a lot better for developement but we should considre changing it to normal in stable branch.
* r300: Convert to shared debug code.Pauli Nieminen2009-08-3110-51/+66
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* r200: Convert r200 to use new style debug code.Pauli Nieminen2009-08-3112-106/+73
| | | | Only very few places where realy converted so there isa lot of to do.
* r600: Convert to shared debug code and add a few new debug messages.Pauli Nieminen2009-08-3114-173/+141
| | | | There is only a few functions that have debugging enabled now.
* radeon: Make OQ to use new style debugging.Pauli Nieminen2009-08-311-11/+12
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* radeon: Add gcc attribute to enable pritnf format warnings.Pauli Nieminen2009-08-311-0/+16
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* r100: Use shared debug code.Pauli Nieminen2009-08-3124-222/+125
| | | | | | Converted r100 to use shared debug code with sed and fast compile check. New code has compability layer so old debugging code doesn't have to be changed all immidiatly.
* radeon: Add common debugging functions.Pauli Nieminen2009-08-318-0/+213
| | | | | | | | | | These function are aiming to make it very simple to add and keep large amount of debugging code without having runtime impact in relase builds. Basic idea is to expose simple printf style debugging functions that are inlined. Level parameter will be evalueted in compile time so compiler can optimise some of debugging functions out if compile time request for debug level is too tight.
* r600: add missing r7xx pci idAlex Deucher2009-08-312-0/+2
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