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* Merge branch 'mesa_7_6_branch'Brian Paul2009-11-042-12/+1
|\ | | | | | | | | | | Conflicts: src/mesa/drivers/windows/gdi/mesa.def
| * Fix YTILE spantmp functionsAlan Hourihane2009-11-041-2/+2
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| * glslcompiler: Fix Mac OS build.Vinson Lee2009-11-041-1/+1
| | | | | | | | Signed-off-by: Brian Paul <[email protected]>
| * windows: remove old entrypoints from mesa.def fileKarl Schultz2009-11-031-12/+0
| | | | | | | | Signed-off-by: Brian Paul <[email protected]>
* | r600: rework draw functionsAlex Deucher2009-11-041-64/+134
| | | | | | | | | | | | | | | | | | | | Seems INDX_OFFSET doesn't work properly on some cards, so change back to immediate mode indices. Seems to only affect DRI1. Needs more investigation. Rework and clean up the draw functions. Signed-off-by: Alex Deucher <[email protected]>
* | r600: fix count prediction for IB caseAlex Deucher2009-11-041-1/+1
| | | | | | | | Signed-off-by: Alex Deucher <[email protected]>
* | Fix YTILE spantmp functionsAlan Hourihane2009-11-041-2/+2
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* | Merge branch 'mesa_7_6_branch'Brian Paul2009-11-031-1/+1
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| * Add --with-dri-searchpath argumentChow Loong Jin2009-10-301-1/+1
| | | | | | | | | | | | | | * Add an extra argument to configure which allows for specifying different DRI driver search paths to libGL (FDO #24766) Signed-off-by: Dan Nicholson <[email protected]>
* | intel: avoid unnecessary front buffer flushing/updatingBrian Paul2009-11-035-2/+27
| | | | | | | | | | | | | | | | | | | | | | Before, if we just called glXMakeCurrent() and didn't render anything we'd still trigger a flushFrontBuffer() call. Now only set the intel->front_buffer_dirty field at state validation time just before we draw something. NOTE: additional calls to intel_check_front_buffer_rendering() might be needed if I missed some rendering paths.
* | mesa: use _mesa_get_current_tex_object()Brian Paul2009-11-021-6/+2
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* | r600: implement LOG op in compilerPierre Ossman2009-11-022-3/+214
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* | r600: implement EXP op in compilerPierre Ossman2009-11-022-3/+130
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* | radeon: add missing includeDave Airlie2009-10-311-0/+1
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* | radeon: use _mesa_get_current_tex_unitDave Airlie2009-10-311-1/+1
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* | intel: Use GTT mapping when available for swrast.Eric Anholt2009-10-303-1/+88
| | | | | | | | | | | | | | This improves piglit quick.tests runtime from 19:33 minutes to 6:06 on my GM45. It should also hide most of the A17 swizzling issues, though they'll still exist when swapping occurs (which is the kernel's problem either way).
* | intel: Fix up z24_x8 depth spans since the texformat merge.Eric Anholt2009-10-301-12/+6
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* | i965: Add an index assert on get_fp_inst array like other compiler arrays.Eric Anholt2009-10-301-0/+1
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* | i965: Fix BRW_WM_MAX_INSN to reflect current limits.Eric Anholt2009-10-301-2/+1
| | | | | | | | Part of fixing bug #24355.
* | intel: Set the texture format in the TFP path.Eric Anholt2009-10-301-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | This fixes a regression in piglit's tfp test as of 11caea687e3f10ae12d33e44edf84635f73047dd. Additionally, set the texture format for the RGB textures to MESA_FORMAT_XRGB8888 and support it in the hw paths so that hopefully sw fallbacks involving TFP get better alpha behavior. The radeon drivers appear to need the same fix. Bug #24803
* | r600: remove duplicate lineAlex Deucher2009-10-301-1/+0
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* | r600: fill in some missing tex formatsAlex Deucher2009-10-301-0/+46
| | | | | | | | | | | | | | | | | | This improves shadowtex since the component ordering is at least correct now, but I'm not sure how to deal with texturing from a depth surface yet due to differences in depth and color tile layouts. Signed-off-by: Alex Deucher <[email protected]>
* | r600: fix a warning, update commentsAlex Deucher2009-10-301-3/+3
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* | r600: use AUTO_INDEX for draw - saves cmd buffer spaceAndre Maasikas2009-10-301-18/+10
| | | | | | | | also seems we can use INDX_OFFSET if start != 0
* | intel: fix up some XRGB breakageBrian Paul2009-10-303-3/+6
| | | | | | | | | | We weren't choosing the right XRGB span functions for reading the framebuffer. XRGB formats still aren't turned on yet though.
* | intel: update intel_create_renderbuffer(format), add XRGB supportBrian Paul2009-10-2912-36/+57
| | | | | | | | | | | | | | | | Pass a gl_format to intel_create_renderbuffer() instead of GLenum. Add cases for MESA_FORMAT_XRGB8888 textures and renderbuffers. However, we don't yet create any renderbuffers or textures with that format. It seems the default alpha value is zero instead of one. Need to investigate that first.
* | r600: remove the no rrb messagesAlex Deucher2009-10-291-2/+0
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* | r600: Add support for ARB_depth_clampAlex Deucher2009-10-292-2/+14
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* | intel: remove memcpy_get_tex_image() codeBrian Paul2009-10-291-103/+2
| | | | | | | | | | This has been lifted into core Mesa where it can be used for all drivers that use the _mesa_get_teximage() fallback for ctx->Driver.GetTexImage().
* | i965: indentation fixBrian Paul2009-10-291-1/+1
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* | i965: make brw_sf_prog_key::sprite_origin_lower_left one bitBrian Paul2009-10-293-5/+5
| | | | | | | | | | Shrinks size of key to 8 bytes from 12. Note that progs/demos/spriteblast.c is still broken.
* | i965: make brw_wm_prog_key a little smallerBrian Paul2009-10-291-3/+3
| | | | | | | | | | | | | | GLushort is big enough for the swizzle and origin fields. The key could probably be made smaller still by re-ordering things. I'll hold off on that until after the outputswritten64 branch is merged. The key will get a little larger again with the GLbitfield64 fields.
* | i915: Fix 1D texture mapping in the t coordinate.Eric Anholt2009-10-291-0/+6
| | | | | | | | Fixes piglit tex1d-2dborder test.
* | i915: Correct and make use of the defines for 32-bit depth texture modes.Eric Anholt2009-10-292-4/+9
| | | | | | | | | | Previously, S8_Z24 depth textures would always be treated as intensity. Fixes piglit depth-tex-modes.
* | i965: avoid shader translation on window resizeBrian Paul2009-10-291-6/+11
| | | | | | | | | | | | | | | | | | | | If the fragment shader doesn't use FRAG_ATTRIB_WPOS (gl_FragCoord) we don't need to worry about the window size and origin in brw_wm_populate_key(). This avoids re-generating the i965 shader code when a window is resized. Issue spotted by Keith Whitwell.
* | i965: define, use BRW_MAX_DRAW_BUFFERSBrian Paul2009-10-293-4/+8
| | | | | | | | | | i965 might support more than 4 color draw buffers. But if not, this protects from breakage if the Mesa limit is raised.
* | i965: remove unused varBrian Paul2009-10-291-1/+0
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* | i965: don't use context state in emit_fb_write()Brian Paul2009-10-293-2/+5
| | | | | | | | | | Put the state that we care about in the hash key. Issue spotted by Keith Whitwell.
* | i965: use macros to get/set prog_instruction::Aux fieldBrian Paul2009-10-294-8/+14
| | | | | | | | This makes things a bit easier to remember/understand.
* | i965: minor code reformattingBrian Paul2009-10-291-4/+3
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* | i915: Implement min/max LOD clamping with the hardware.Eric Anholt2009-10-294-40/+46
| | | | | | | | | | | | | | This gets us expected behavior for clamping between mipmap levels, and avoids relayout of textures for doing clamping. Fixes piglit lodclamp-between.
* | i965: Replace a MIN(MAX()) with CLAMP().Eric Anholt2009-10-291-2/+2
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* | intel: check for single memcpy() in memcpy_get_tex_image()Brian Paul2009-10-291-5/+10
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* | i965: Fix fallout from ARB_depth_clamp enablement that broke glDepthRange.Eric Anholt2009-10-291-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | If a backwards glDepthRange was supplied (as with the old Quake no-z-clearing hack), the hardware would have always clamped because we weren't clamping to the min of near/far and the max of near/far. Also, we shouldn't be clamping to near/far at all when not in depth clamp mode (this usually didn't matter since near/far are usually the same as the 0.0, 1.0 clamping you do for fixed-point depth). This should fix funny depth issues in PlaneShift, and fixes piglit depth-clamp-range
* | intel: Don't bother MI_FLUSHing on glFlush in the DRI2 case.Eric Anholt2009-10-291-1/+1
| | | | | | | | | | | | We only need it when drawing to the front buffer, which we never do for DRI2. No significant performance difference, but the flush is definitely gone from the end of every batchbuffer.
* | intel: Clean up merge leftover from the DRI2 swap throttling.Eric Anholt2009-10-291-5/+0
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* | intel: remove debug codeBrian Paul2009-10-291-1/+0
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* | intel: added fast memcpy path for glGetTexImage()Brian Paul2009-10-291-3/+102
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* | radeon: fix incorrect Z format in radeon_alloc_renderbuffer_storage()Brian Paul2009-10-291-2/+2
| | | | | | | | And update error message.
* | mesa: re-remove s3v and trident driver filesBrian Paul2009-10-283-1350/+0
| | | | | | | | | | These were removed from master but a few files came back from the texformat-rework branch.
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