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* [965] Remove dead code in upload_wm_surfaces.Eric Anholt2007-12-071-3/+0
* [965] Move brw_surface_state stack allocation into the function using it.Eric Anholt2007-12-071-30/+28
* i915: fix the error in the previos commit.Xiang, Haihao2007-12-071-1/+1
* i915: Check the program size when uploading a program. fix bug 13494Xiang, Haihao2007-12-071-6/+8
* Revert "[965] Add missing flagging of new stage programs for updating stage s...Eric Anholt2007-12-055-94/+53
* [965] Add missing flagging of new stage programs for updating stage state.Eric Anholt2007-12-055-53/+94
* Don't Swap buffer if a DRIDrawable is entirely obscuredXiang, Haihao2007-12-051-0/+3
* [965] Change constant buffer from state structs to plain batch emission.Eric Anholt2007-12-031-40/+22
* i915: Fix up state changes for i8xx.Michel Dänzer2007-12-031-6/+56
* [intel] Move batch bo_unmap from TTM code to shared, and add more asserts.Eric Anholt2007-11-303-2/+8
* [intel] Add failure path printfs to relocation code and some comments.Eric Anholt2007-11-301-3/+32
* [intel] Simplify TTM relocation code by passing around bufmgr struct.Eric Anholt2007-11-301-24/+26
* [intel] Fix the type and naming of the flags/mask args to TTM functions.Eric Anholt2007-11-304-35/+35
* [intel] intel_bufmgr_ttm style sanityEric Anholt2007-11-301-308/+343
* Merge branch 'master' of git+ssh://[email protected]/git/mesa/mesajoukj2007-11-30107-9411/+8748
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| * i965: if source depth to render target is set,Xiang, Haihao2007-11-301-0/+14
| * i965: use uncompressed instruction to ensure onlyXiang, Haihao2007-11-301-0/+1
| * [i915] Make INTEL_DEBUG=bufmgr actually do things for bufmgr_fake.Eric Anholt2007-11-293-6/+17
| * New ctx->Driver.Map/UnmapTexture() functions for accessing textures from t_vb...Brian2007-11-291-0/+2
| * r200: Fix texture format regression on big endian systems.Michel Dänzer2007-11-281-3/+6
| * i965: update RefCount when using Vertex/Fragment program.Xiang, Haihao2007-11-281-0/+2
| * use DEFAULT_SOFTWARE_DEPTH_BITSDelle2007-11-271-9/+11
| * i965: The jump instruction count is addedXiang, Haihao2007-11-271-1/+1
| * i915: Catch cases where not all state is emitted for a new batchbuffer.Keith Whitwell2007-11-266-1/+56
| * i915: Some additional blit fixes and assertions.Michel Dänzer2007-11-261-8/+24
| * intel: Fix relative symlinks.Michel Dänzer2007-11-252-2/+2
| * fix z buffer read/write issue with rv100-like chips and old ddxRoland Scheidegger2007-11-221-1/+5
| * [965] Replace 965 texture format code with common code.Eric Anholt2007-11-208-187/+8
| * [965] Remove dead exec vfmt code which was replaced by generic vbo code.Eric Anholt2007-11-201-530/+0
| * [965] Add INTEL_DEBUG=fall debugging output.Eric Anholt2007-11-191-5/+17
| * [965] Convert DBG macro to use FILE_DEBUG_FLAG like i915.Eric Anholt2007-11-1912-16/+31
| * [intel] Add 965 support to shared intel_blit.cEric Anholt2007-11-1612-75/+119
| * [i915] Pass static region names in so debugging says more than "static region".Eric Anholt2007-11-163-12/+17
| * [intel] Move additional code to be shared from intel_context.h to intel/.Eric Anholt2007-11-164-59/+87
| * [intel] Move intel_tex.h into place, forgotten in the previous commit.Eric Anholt2007-11-161-0/+0
| * [965] Add batchbuffer decode for several more packets.Eric Anholt2007-11-161-3/+127
| * [intel] Fix typos in intel_chipset.h macros.Eric Anholt2007-11-161-6/+6
| * [i915] Add INTEL_DEBUG=sync debug flag to wait for fences after making them.Eric Anholt2007-11-163-0/+8
| * [i915] Reenable batchbuffer debug under INTEL_DEBUG=bat.Eric Anholt2007-11-161-4/+4
| * [intel] Add some doxygen notes on what the bufmgr_fake block members mean.Eric Anholt2007-11-161-2/+11
| * [intel] Add a simple relocation cache to the fake buffer manager.Eric Anholt2007-11-161-35/+91
| * [intel] Assert against 0-sized buffers in dri_bufmgr_fake.c.Eric Anholt2007-11-161-0/+4
| * [intel] Add support for multiple levels of relocation in bufmgr_fake.Eric Anholt2007-11-162-73/+163
| * [i915] Push locking in intelClearWithTris down inside meta_draw_poly.Eric Anholt2007-11-162-85/+72
| * fix bogus assumption if ddx has set up surface reg for z bufferRoland Scheidegger2007-11-151-2/+1
| * i965: correct the opcode of XY_SETUP_BLT_CMD. fix bug #12730Xiang, Haihao2007-11-121-1/+1
| * [i915] Remove old frontbuffer rotation hack.Eric Anholt2007-11-0911-564/+8
| * [intel] By default, output batchbuffer decode to stderr like other debug info.Eric Anholt2007-11-091-1/+1
| * [intel] Initialize a depth buffer if the visual has depth 24 but no stencil.Eric Anholt2007-11-091-15/+28
| * [intel] Move over files that will be shared with 965-fbo work.Eric Anholt2007-11-0945-8055/+8072