summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers
Commit message (Collapse)AuthorAgeFilesLines
* r300compiler: fix scons buildJoakim Sindholt2010-06-051-0/+2
|
* i915: Only emit a MI_FLUSH when the drawing rectangle offset changes.Chris Wilson2010-06-052-8/+24
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i915: Fix off-by-one for drawing rectangle.Chris Wilson2010-06-051-2/+2
| | | | | | | | | | | | | | | The drawing rectangle is given in *inclusive* pixel values, so the range is only [0,2047]. Hence when rendering to a 2048 wide target, such as an extended desktop, we would issue an illegal instruction zeroing the draw area. Fixes: Bug 27408: Primary and Secondary display blanks in extended desktop mode with Compiz enabled https://bugs.freedesktop.org/show_bug.cgi?id=27408 Signed-off-by: Chris Wilson <[email protected]>
* i915: Inhibit render cache flush when changing drawing rectangle offset.Chris Wilson2010-06-051-1/+1
| | | | Signed-off-by: Chris Wilson <[email protected]>
* r300/compiler: implement SIN+COS+SCS for vertex shadersMarek Olšák2010-06-053-21/+76
|
* r300/compiler: implement SNE unwound for r3xx VS, natively for r5xx VSMarek Olšák2010-06-052-1/+37
|
* r300/compiler: implement SEQ unwound for r3xx VS, natively for r5xx VSMarek Olšák2010-06-052-0/+36
| | | | Fixes piglit/glsl-vs-vec4-indexing-4.
* r300/compiler: implement SFL for vertex shadersMarek Olšák2010-06-051-2/+3
| | | | And sort the "case" statements alphabetically.
* i915: Don't use XRGB8888 on 830 and 845.Eric Anholt2010-06-043-2/+18
| | | | | | | | | The support for XRGB8888 appeared in the 855 and 865, and this format is reserved on 830/845. This should fix a regression from b4a6169412819cc3a027c6a118f0537911145a30 that caused hangs in etracer on 845s. Bug #26557.
* i915: Clamp minimum lod to maximum texture level too.Eric Anholt2010-06-041-1/+3
| | | | | | | Otherwise, we'd run into minlod > maxlod, and the sampler would give us the undefined we asked for. Bug #24846. Fixes OGLC texlod.c.
* intel: Fix intel_compressed_num_bytes for FXT1 after I broke it.Eric Anholt2010-06-041-1/+1
| | | | | | | | Fixes piglit fxt1-teximage since 7554b83a21bd62b20df5a7327b69f08108ac9ab6, and also OGLC tests that hit FXT1 with a million other things. Bug #28184.
* r300/compiler: print opcode names instead of numbersMarek Olšák2010-06-033-8/+8
|
* dri/swrast: Remove unnecessary header.Vinson Lee2010-06-021-1/+0
|
* intel: Remove a leftover DRI1/DRI2 conditionalKristian Høgsberg2010-06-021-7/+2
|
* intel: Fallback to meta if we're asked to CopyTexImage2D from RGB to RGBAKristian Høgsberg2010-06-011-0/+8
| | | | | | | The pixel transfer rules state that we must set alpha to 1.0 in this case which we can't easily do with the blitter. We can do to passes: one that sets the alpha to 0xff and one that copies the RGB bits or we can just use the 3D engine. Neither approach seems worth it for this case.
* swrast: add TFP support to swrast.Dave Airlie2010-05-311-0/+69
| | | | | | | | | This adds TFP support to the swrast driver, with this I can run gnome-shell inside Xephyr slowly. I've no idea why I did it, and g-s has other rendering issues under swrast, but it might be useful to hook up llvmpipe later. I've no idea if I even want to commit it at this point. An enhanced version might just pass the pointer in the indirect rendering case and avoid the memcpy. Signed-off-by: Dave Airlie <[email protected]>
* gallium: fix TFP on galliumDave Airlie2010-05-311-0/+1
| | | | | | | | This fixes an uninitialised value use in the dri2 st when doing TFP. It uses the driContextPriv which isn't initialised at alloc time. Signed-off-by: Dave Airlie <[email protected]>
* intel: Initialize batch->reserved_space on allocationChris Wilson2010-05-311-2/+1
| | | | | | | | | | | | | | Fixes the assert (and buffer overrun): glknots: intel_batchbuffer.c:164: _intel_batchbuffer_flush: Assertion 'used >= batch->buf->size' failed. Reported in bug: Bug 28274 - xscreensaver's glknots hangs GPU (945GME/Pineview) https://bugs.freedesktop.org/show_bug.cgi?id=28274 Signed-off-by: Chris Wilson <[email protected]>
* r300: fix blits for textures of width/height greater than 2048 on r5xxMarek Olšák2010-05-291-5/+9
| | | | Yes I am fixing r300c ... who knew?
* i965: Add cache unit -> bo name mapping for more gen6 state objects.Eric Anholt2010-05-281-0/+3
| | | | This will help in bufmgr debugging and aub dumping.
* i965: fix PIPE_CONTROL command for gen6.Zou Nan hai2010-05-281-1/+10
| | | | | Signed-off-by: Zou Nan hai <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* fbdev: some hacking to get the driver to compile (untested)Brian Paul2010-05-271-1/+7
|
* Enable hardware mipmap generation for radeon.Will Dyson2010-05-261-3/+8
| | | | | | | Use _mesa_meta_GenerateMipmap. It is Fast Enough(tm). Signed-off-by: Maciej Cencora <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* Fix image_matches_texture_obj() MaxLevel checkWill Dyson2010-05-261-4/+7
| | | | | | | | | When generating or uploading a new (higher) mipmap level for an image, we can need to allocate a miptree for a level greater than texObj->MaxLevel. Signed-off-by: Maciej Cencora <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* Fallback to software render if there is no miptree for an imageWill Dyson2010-05-261-4/+4
| | | | | | | | This can happen when checking if a software fallback for a higher level operation (such as GenerateMipmap) is needed. Signed-off-by: Maciej Cencora <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* i965: Add support for EXT_timer_query on Ironlake.Eric Anholt2010-05-262-24/+67
| | | | | | We could potentially do this on G45 as well, though the units are different. On 965, the timestamp is tied to hclk, which would make supporting it harder.
* intel: Handle decode of PIPE_CONTROL instructions.Eric Anholt2010-05-261-0/+27
|
* i965: Move Gen6 debugging emit_mi_flush into the Gen6 block.Eric Anholt2010-05-261-2/+2
|
* i965: Don't PIPE_CONTROL instruction cache flush.Eric Anholt2010-05-261-1/+0
| | | | | | | | | | | | This is a workaround for Ironlake errata. The emit_mi_flush is used for a few purposes: 1) Flushing write caches for RTT (including blit to texture) 2) Pipe fencing for sync objects 3) Spamming cache flushes to track down cache flush bugs Spamming cache flushes seems less important than following the docs, and we should probably do that with a different mechanism than the one for render cache flushes.
* i965: Emit MI_FLUSH before PSP on Ironlake for clip max threads errata.Eric Anholt2010-05-261-0/+7
|
* r300/compiler: implement SGT+SLE opcodesMarek Olšák2010-05-261-0/+20
| | | | Reported-by: Gianluca Anzolin <[email protected]>
* r300/compiler: fix dumping r5xx vertex shadersMarek Olšák2010-05-261-0/+3
|
* r300/compiler: move hardware caps to the radeon_compiler base structMarek Olšák2010-05-266-18/+19
| | | | Needed for vertex shaders too.
* r300/compiler: shorten swizzle expressionsMarek Olšák2010-05-261-44/+65
|
* meta: Convert Z value from normalized to object-space in meta codeBrian Paul2010-05-241-4/+19
| | | | | | | | | | | | | | Convert Z from a normalized value in the range [0, 1] to an object-space Z coordinate in [-1, +1] so that drawing at the new Z position with the default/identity ortho projection results in the original Z value. Used by the meta-Clear, Draw/CopyPixels and Bitmap functions where the Z value comes from the clear value or raster position. Fixes piglit tests fdo23670-depth_test, quad-invariance and glsl-orangebook-ch06-bump as well as oglc zbfunc.c. https://bugs.freedesktop.org/show_bug.cgi?id=23670
* i965: Add support for all 8 possible ARB_draw_buffers in Mesa.Eric Anholt2010-05-232-2/+1
| | | | | We should be able to do 16, but are limited by Mesa's static buffer allocations.
* i965: Fix bit allocation for number of color regions for ARB_draw_buffers.Eric Anholt2010-05-231-1/+1
| | | | | | | | If you used all 4 color targets we currently support, we would see 0 and end up just writing the first output. Give enough bits that we can do the maximum of 16. Fixes piglit fbo-drawbuffers-maxtargets.
* i965: remove disabled code for cycling through MRF registers in clipping.Eric Anholt2010-05-202-17/+2
| | | | | | | The idea would be that you could have multiple send messages going on if nothing depended on the previous message's results and you used a different send message. The problem is that the later send requires the VUE handle returned by the first send's allocate anyway.
* intel: Throttle after doing copyregion/swapbuffers round tripKristian Høgsberg2010-05-204-35/+29
| | | | | | | | | | | Before we would throttle in the flush callback prior to round-tripping to the server to do copyregion or swapbuffer. Now, instead just note that we need to throttle and do it in intel_prepare_render(), which will be called after receiving the response from the server but before we start rendering the next frame. Even if the server also throttles us in swapbuffer, this just makes the throttling a no-op when we hit intel_prepare_render(). With that we can drop the using_dri2_swapbuffers hack and just always throttle.
* r300/compiler: Implement constant foldingNicolai Hähnle2010-05-191-1/+215
| | | | Signed-off-by: Nicolai Hähnle <[email protected]>
* r300/compiler: Emit 0.5 swizzle when necessary.Tom Stellard2010-05-191-1/+3
| | | | Signed-off-by: Marek Olšák <[email protected]>
* i965: Remove constant or ignored-by-hw args from FF sync message setup.Eric Anholt2010-05-184-64/+32
|
* i965: Revert accidental debug change in 562e2d114ec0cba8Eric Anholt2010-05-181-1/+1
|
* gen6 fix: fix a wrong bit in binding_table_pointerZou Nan hai2010-05-181-1/+1
|
* i965: Fix point coordinate replacement after airlied's ffvertex changes.Eric Anholt2010-05-173-2/+24
| | | | | | | | This basically restores the previous state, where a vertex result slot is set up for the texcoord to be replaced with point coord. Fixes piglit point-sprite test. Bug #27625
* i965: Add SF program disasm under INTEL_DEBUG=sf.Eric Anholt2010-05-173-2/+11
|
* intel: Call intel_draw_buffer() again after _mesa_make_current()Kristian Høgsberg2010-05-171-0/+6
| | | | | | | | The initial call to intel_draw_buffers() happens when intel->ctx.DrawBuffer is still NULL. Call it again after calling _mesa_make_current(). https://bugs.freedesktop.org/show_bug.cgi?id=28112
* i965: Make rasterization of single and multiple quad prims match.Eric Anholt2010-05-171-0/+6
| | | | | | | | This is trying to follow the spirit of the invariance rules, though they're not specific on this point. Fixes quad-invariance piglit test while retaining the 22s -> 18s win on glean blendFunc. This was a regression in c67d9d84f501f145f841c0b981caff6f4dfd936f.
* i965: Remove the half-baked code for multiple OQs at the same time.Eric Anholt2010-05-163-21/+13
| | | | | GL doesn't actually let you begin an OQ while one is active, so the extra work was pointless.
* i965: Remove unused occlusion query struct field.Eric Anholt2010-05-161-3/+0
|