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* i965: Convert upload_default_color to genxml.Rafael Antognolli2017-06-221-77/+85
| | | | | | | | | | This function was moved to genX_state_upload.c but was still not using genxml. By converting it to genxml, we make some things simpler, like setting haswell's border color state, but others are more complex, since the structs used by each gen are different. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Remove unused code and delete file.Rafael Antognolli2017-06-222-626/+0
| | | | | | | | The sampler state code was all moved to genxml, so we can get rid of these functions and delete the file. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Convert vs, gs, tcs, tes and cs samplers to genxml.Rafael Antognolli2017-06-223-126/+123
| | | | | | | | Since they just use the code that is already available in genX_state_upload.c, convert them in one batch. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Convert fs sampler state to use genxml.Rafael Antognolli2017-06-223-23/+540
| | | | | | | | Also convert some auxiliary functions used by it, and copy upload_default_color to genX_state_upload.c. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Fix -Wunused-variable in gen8_write_pma_stall_bits()Chad Versace2017-06-221-2/+0
| | | | Trivial fix. 'ctx' was unused.
* i965/dri: Add intel_screen param to intel_create_winsys_renderbufferChad Versace2017-06-223-11/+17
| | | | | | | The param is currently unused. It will later be used it to support R8G8B8X8 EGLConfigs on Skylake. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Move brw_context format arrays to intel_screenChad Versace2017-06-224-40/+64
| | | | | | | | | | | | | | | | | | | This allows us to query the driver's supported formats in i965's DRI code, where often there is available a DRIscreen but no GL context. To reduce diff noise, this patch does not completely remove brw_context's format arrays. It just redeclares them as pointers which point to the arrays in intel_screen. Specifically, move these two arrays from brw_context to intel_screen: mesa_to_isl_render_format[] mesa_format_supports_render[] And add a new array to intel_screen, mesa_format_supportex_texture[] which brw_init_surface_formats() copies to ctx->TextureFormatSupported. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Rename some vague format members of brw_contextChad Versace2017-06-229-28/+28
| | | | | | | | | | | | | | | | | | | | | | I'm swimming in a vortex of formats. Mesa formats, isl formats, DRI formats, GL formats, etc. It's easy to misinterpret the following brw_context members unless you've recently read their definition. In upcoming patches, I change them from embedded arrays to simple pointers; after that, even their definition doesn't help, because the MESA_FORMAT_COUNT hint will no longer be present. Rename them to prevent further confusion. While we're renaming, choose shorter names too. -format_supported_as_render_target +mesa_format_supports_render -render_target_format +mesa_to_isl_render_format Reviewed-by: Kenneth Graunke <[email protected]>
* i915: Fix gl_Fragcoord interpolationVille Syrjälä2017-06-225-16/+21
| | | | | | | | | | | | | | | | gl_FragCoord contains the window coordinates so it seems to me that we should not use perspective correct interpolation for it. At least now I get similar output as i965/swrast/llvmpipe produce. This fixes dEQP-GLES2.functional.shaders.builtin_variable.fragcoord_w. dEQP-GLES2.functional.shaders.builtin_variable.fragcoord_xyz was already passing, though I'm not quite sure how it managed to do that. v2: Add definitons for the S3 "wrap shortest" bits as well (Ian) Cc: [email protected] Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
* mesa: remove _NEW_BUFFER_OBJECTMarek Olšák2017-06-221-1/+0
| | | | | | | | not used Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: replace VP/FP/ATIfs _Enabled flags with helper functionsMarek Olšák2017-06-2210-20/+25
| | | | | | | | These are only used in the GL compatibility profile. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: don't update draw buffer bounds in _mesa_update_stateMarek Olšák2017-06-229-0/+29
| | | | | | | | | | | | | | | | st/mesa doesn't need the draw bounds for draw calls. I've added the call where it's necessary in core Mesa and drivers, but I suspect that most drivers can just move the call to the right places. The core Mesa places aren't hot paths, so the call overhead doesn't matter there. For now, only st/mesa is made such that this function is invoked very rarely. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: replace ctx->Polygon._FrontBit with a helper functionMarek Olšák2017-06-229-5/+214
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: replace ctx->VertexProgram._TwoSideEnabled with a helper functionMarek Olšák2017-06-222-3/+4
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: replace _mesa_update_stencil() with helper functionsMarek Olšák2017-06-2217-21/+37
| | | | | | | | | | | | | The idea is to remove the dependency on _mesa_update_state_locked, so that st/mesa can skip it for stencil state updates, and then stop setting _NEW_STENCIL in mesa/main if the driver is st/mesa. The main motivation is to stop invoking _mesa_update_state_locked for certain state groups. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* meta: do the full FBO completeness check in decompress_texture_imageMarek Olšák2017-06-221-0/+5
| | | | | | | | | | _mesa_update_state will no longer recompute Width/Height if the framebuffer is complete. We now rely on the FBO completeness check to do it. The only code that needs to be fixed seems to be this one. Reviewed-by: Ian Romanick <[email protected]> Tested-by: Ian Romanick <[email protected]>
* i965/gen6: Use isl-based miptree also for stencil rbsPohjolainen, Topi2017-06-211-3/+16
| | | | | | | | Fixes dEQP-EGL.functional.image.render_multiple_contexts. gles2_renderbuffer_stencil_stencil_buffer Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Remove spurious mutex frobbing around call to intel_miptree_blitIan Romanick2017-06-211-13/+6
| | | | | | | | | | | | | | | These locks were added in 2f28a0dc, but I don't see anything in the intel_miptree_blit path that should make this necessary. When asked, Kristian says: I doubt it's needed now with the new blorp. If I remember correctly, I had to drop the lock there since intel_miptree_blit() could hit the XY blit path that requires a fast clear resolve. The fast resolve being meta, would then try to lock the texture again. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965/miptree: Move isl_surf_get_(hiz|mcs)_surf out of the assertJason Ekstrand2017-06-211-4/+6
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101535 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101538 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101539 Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/genxml: Normalize URB Data field in WM_STATE.Rafael Antognolli2017-06-211-1/+1
| | | | | | | | | | On gen6+, this is called "Dispatch GRF Start Register For Constant/Setup Data 0", while on gen5 and lower it's called only "Dispatch GRF Start Register For URB Data", but it's essentially the same thing (URB data), so rename it to match newer gens and simplify the C code that handles it. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/genxml: Rename field on WM_STATE to match gen6+.Rafael Antognolli2017-06-211-1/+1
| | | | | | | | "Pixel Shader Kill Pixel" -> "Pixel Shader Kills Pixel", which is how it's called on newer gens. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/genxml: Normalize fields on WM_STATE.Rafael Antognolli2017-06-211-2/+2
| | | | | | | | | On gen4, WM_STATE only has one Kernel Start Pointer and one GRF Register Count, but we can make the code that handles this on multiple gens simpler if we add an index 0 to it too. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i915: Always emit W on gen3Ville Syrjälä2017-06-211-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Unlike the older gen2 hardware, gen3 performs perspective correct interpolation even for the primary/secondary colors. To do that it naturally needs us to emit W for the vertices. Currently we emit W only when at least one texture coordinate set gets emitted. This means the interpolation of color will change depending on whether texcoords/varyings are used or not. That's probably not what anyone would expect, so let's just always emit W to get consistent behaviour. Trying to avoid emitting W seems like more hassle than it's worth, especially as bspec seems to suggest that the hardware will perform the perspective division anyway. This used to be broken until it was accidentally fixed it in commit c349031c27b7 ("i915: Fix texcoord vs. varying collision in fragment programs") by introducing a bug that made the driver always emit W. After fixing that bug in commit c1eedb43f32f ("i915: Fix wpos_tex vs. -1 comparison") we went back to the old behaviour and caused an apparent regression. Fixes: c1eedb43f32f ("i915: Fix wpos_tex vs. -1 comparison") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101451 Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* intel: compiler/i965: fix is_broxton checksLionel Landwerlin2017-06-201-1/+1
| | | | | | | | | | In 5f2fe9302c is_geminilake was introduced for the differenciate broxton from geminilake. Unfortunately I failed as verifying that is_broxton is throughout the code base to mean Gen9lp. Fixes: 5f2fe9302c ("intel: common: add flag to identify platforms by name") Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fall back to normal blorp clear instead of meta clearIan Romanick2017-06-203-34/+30
| | | | | | | | | | | | When intel_miptree_alloc_non_msrt_mcs fails, fall back to normal blorp color clear instead of falling back to meta. With this change, brw_blorp_clear_color can never fail. v2: Combine two if-statements to remove a level of indentation. Suggested by Jason. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* meta/blit: Silence unused parameter warningIan Romanick2017-06-201-2/+2
| | | | | | | | | | drivers/common/meta_blit.c: In function ‘setup_glsl_msaa_blit_scaled_shader’: drivers/common/meta_blit.c:62:58: warning: unused parameter ‘filter’ [-Wunused-parameter] GLenum target, GLenum filter) ^~~~~~ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* meta: Silence unused parameter warningIan Romanick2017-06-201-2/+2
| | | | | | | | | drivers/common/meta.c:2694:71: warning: unused parameter ‘dims’ [-Wunused-parameter] copytexsubimage_using_blit_framebuffer(struct gl_context *ctx, GLuint dims, ^~~~ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Fix incorrect commentIan Romanick2017-06-201-1/+1
| | | | | | | | | There is no intel_miptree_slice_has_hiz function, but there is a intel_miptree_level_has_hiz function. I assume that's the correct one to use. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: perf: use gen_device_info rather then brw_contextLionel Landwerlin2017-06-191-3/+4
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel: common: express timestamps units in frequencyLionel Landwerlin2017-06-191-1/+1
| | | | | | | | | | | | | | Rather than storing the period as a double that looses some precision. Also fixes the Gen9LP timestamp frequency which is no 19200123 but 19200000 as pointed by Ville : https://lists.freedesktop.org/archives/intel-gfx/2017-April/125126.html Finally add the Cannonlake timestamp frequency. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: convert MI_REPORT_PERF_COUNT to genxmlLionel Landwerlin2017-06-193-28/+34
| | | | | | | Also make it available from gen7 only to gen7+. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: perf: fix codegen with single operand equationLionel Landwerlin2017-06-191-1/+3
| | | | | | | | We did support single value operand equations, but not single variable operand ones. In particular we were failing on "$Sampler0Bottleneck". Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/wm: Use stored hiz surface instead of creating copyTopi Pohjolainen2017-06-193-86/+2
| | | | | | | Now the last user of intel_miptree_get_aux_isl_surf() is gone. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Use hiz surface instead of creating copyTopi Pohjolainen2017-06-191-14/+10
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree/gen7+: Use isl for hiz layoutsTopi Pohjolainen2017-06-197-245/+33
| | | | | | | v2: Use better assert by checking isl_surf_get_hiz_surf() Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Drop BO_ALLOC_FOR_RENDER in intel_miptree_alloc_mcs()Topi Pohjolainen2017-06-191-1/+6
| | | | | | | because buffers get unconditionally initialised by cpu writing. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Use isl for mcs layoutsTopi Pohjolainen2017-06-193-88/+21
| | | | | | | | | | | and pass the ccs isl surface to blorp instead of creating a copy. v2 (Jason): Explain ccs change and use better assert checking isl_surf_get_mcs_surf() Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Refactor aux surface allocationTopi Pohjolainen2017-06-191-18/+36
| | | | | | | | | v2 (Jason): Drop unused argument in intel_alloc_aux_buffer() and move assignment of "buf->surf" in intel_alloc_aux_buffer() into this patch. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/gen6: Use isl for hizTopi Pohjolainen2017-06-194-40/+27
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Refactor isl aux usage resolverTopi Pohjolainen2017-06-194-22/+41
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/gen6: Use isl for stencil surfacesTopi Pohjolainen2017-06-192-19/+19
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Prepare range getter for isl basedTopi Pohjolainen2017-06-191-1/+8
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Prepare stencil mapping for isl basedTopi Pohjolainen2017-06-191-4/+28
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Prepare for isl based miptreesTopi Pohjolainen2017-06-191-2/+7
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Add isl based miptree creatorTopi Pohjolainen2017-06-191-0/+72
| | | | | | | | v2: Use new brw_bo_alloc_tiled() interface Reviewed-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Add option to resolve offsets using isl_surfTopi Pohjolainen2017-06-191-0/+19
| | | | | | | | v2 (Nanley): Add comment telling why "level -= mt->first_level" Reviewed-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Prepare slice copy for isl based miptreesTopi Pohjolainen2017-06-191-6/+22
| | | | | | | | | v2 (Jason): Fix a helper variable only used for assert - open code instead. Reviewed-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/tex: Prepare image update for isl based miptreesTopi Pohjolainen2017-06-191-3/+16
| | | | | | Reviewed-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Prepare framebuffer validator for isl based miptreesTopi Pohjolainen2017-06-191-3/+30
| | | | | | Reviewed-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Prepare slice validator for isl based miptreesTopi Pohjolainen2017-06-192-11/+23
| | | | | | | | | v2 (Nanley): Minify depth in case of 3D surface. Also moved to .c file to get minify() without additional header inclusions Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
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