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* i915: Enable LOD preclamping on 8xx like on 915/965.Eric Anholt2011-01-052-0/+3
* i915: Implement min/max lod clamping in hardware on 8xx.Eric Anholt2011-01-053-25/+32
* intel: Drop TEXTURE_RECTANGLE check in miptree layout setup.Eric Anholt2011-01-051-37/+24
* intel: Clean up redundant setup of firstLevel.Eric Anholt2011-01-051-5/+4
* intel: Drop a check for GL_TEXTURE_4D_SGIS.Eric Anholt2011-01-051-1/+0
* i965: Simplify the renderbuffer setup code.Eric Anholt2011-01-051-102/+93
* i965: use BLT to clear buffer if possible on SandybridgeXiang, Haihao2011-01-051-6/+0
* i965: Add support for SRGB DXT1 formats.Eric Anholt2011-01-043-2/+10
* intel: Merge our choosetexformat fallbacks into core.Eric Anholt2011-01-045-229/+60
* r300/compiler: disable the rename_regs pass for loopsMarek Olšák2011-01-041-0/+8
* r300/compiler: Fix black terrain in Civ4Tom Stellard2011-01-041-8/+1
* intel: When validating an FBO's combined depth/stencil, use the given FBO.Eric Anholt2011-01-041-4/+4
* intel: Fix segfaults from trying to use _ColorDrawBuffers in FBO validation.Eric Anholt2011-01-041-4/+16
* osmesa: pass context to _mesa_update_framebuffer_visual()Brian Paul2011-01-041-1/+1
* i965: Use last vertex convention for quad provoking vertex on sandybridgeZhenyu Wang2011-01-041-0/+7
* i965: Correct comment for gen6 fb write control message settingZhenyu Wang2011-01-041-1/+3
* i965: Fix provoking vertex select in clip state for sandybridgeZhenyu Wang2011-01-041-1/+4
* intel: Use tri clears when we don't know how to blit clear the format.Eric Anholt2011-01-033-7/+10
* intel: Handle forced swrast clears before other clear bits.Eric Anholt2011-01-031-22/+20
* radeon: fix build on non-KMS systems.Dave Airlie2011-01-031-0/+3
* i965: Do lowering of array indexing of a vector in the FS.Eric Anholt2010-12-281-0/+1
* i965: Fix regression in FS comparisons on original gen4 due to gen6 changes.Eric Anholt2010-12-282-4/+32
* i965: Factor out the ir comparision to BRW_CONDITIONAL_* code.Eric Anholt2010-12-281-80/+34
* i965: Fix occlusion query on sandybridgeZhenyu Wang2010-12-281-0/+6
* Revert "i965: upload multisample state for fragment program change"Zhenyu Wang2010-12-283-38/+25
* i965: Internally enable GL_NV_blend_square on ES2.Kenneth Graunke2010-12-271-0/+1
* i965: don't spawn GS thread for LINELOOP on SandybridgeXiang, Haihao2010-12-271-1/+4
* i965: Flatten if-statements beyond depth 16 on pre-gen6.Kenneth Graunke2010-12-271-0/+10
* intel: Only do frame throttling at glFlush time when using frontbuffer.Eric Anholt2010-12-251-1/+2
* i965: use align1 access mode for instructions with execSize=1 in VSXiang, Haihao2010-12-241-0/+2
* i965: fix register region descriptionXiang, Haihao2010-12-241-1/+1
* intel: Remove unnecessary headers.Vinson Lee2010-12-232-2/+0
* i965: Remove unnecessary headers.Vinson Lee2010-12-231-2/+0
* i965: Keep around a copy of the VS constant surface dumping code.Eric Anholt2010-12-231-0/+9
* i965: Correct the dp_read message descriptor setup on g4x.Eric Anholt2010-12-233-1/+23
* i965: upload multisample state for fragment program changeZhenyu Wang2010-12-233-25/+38
* i965: Use MI_FLUSH_DW for blt ring flush on sandybridgeZhenyu Wang2010-12-232-2/+7
* i965: explicit tell header present for fb write on sandybridgeZhenyu Wang2010-12-224-8/+8
* i965: Avoid using float type for raw moves, to work around SNB issue.Eric Anholt2010-12-212-4/+8
* intel: Check for unsupported texture when finishing using as a render targetChris Wilson2010-12-211-1/+2
* nouveau: fix includes for latest libdrmBen Skeggs2010-12-211-1/+1
* r600c : inline vertex format is not updated in an app, switch to use vfetch c...richard2010-12-161-1/+1
* intel: Support glCopyTexImage() from XRGB8888 to ARGB8888.Eric Anholt2010-12-163-2/+94
* intel: Try to sanely check that formats match for CopyTexImage.Eric Anholt2010-12-161-40/+20
* intel: Drop commented intel_flush from copy_teximage.Eric Anholt2010-12-161-1/+0
* intel: Update renderbuffers before looking up CopyTexImage's read buffer.Eric Anholt2010-12-161-3/+4
* i965: Set the alternative floating point mode on gen6 VS and WM.Eric Anholt2010-12-163-0/+8
* i915: Fix INTEL_DEBUG=wm segmentation faultShuang He2010-12-161-5/+5
* i965: Add support for using the BLT ring on gen6.Eric Anholt2010-12-138-56/+72
* i965: Improve the hacks for ARB_fp scalar^scalar POW on gen6.Eric Anholt2010-12-131-36/+17
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