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* intel: add GL_EXT_framebuffer blit extensionBrian Paul2009-01-222-2/+74
| | | | | | This functionality is required by GL_ARB_framebuffer_object. For now, implement it in terms of glCopyPixels(). This will need to be revisted though.
* intel: remove/disable the "paired depth/stencil" codeBrian Paul2009-01-225-12/+2
| | | | | | We only allow combined depth+stencil renderbuffers so the complicated code for splitting and combining separate depth and stencil buffers is no longer needed.
* intel: asst clean-ups, simplifications in intel_draw_buffer()Brian Paul2009-01-221-30/+16
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* intel: remove unneeded call to ctx->Driver.DepthRange()Brian Paul2009-01-221-3/+0
| | | | The preceeding call to intel_draw_buffer() does that.
* i965: disallow separate depth/stencil renderbuffersBrian Paul2009-01-221-11/+11
| | | | | | | | | Take advantage of the GL_FRAMEBUFFER_UNSUPPORTED feature to disallow separate depth and stencil renderbuffers; only allow combined depth/stencil buffers. Next up: remove/simplify a bunch of the depth/stencil renderbuffer code. Also: restore the previously disabled GL_DEPTH_COMPONENT16 case
* i965: minor reformattingBrian Paul2009-01-221-5/+9
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* intel: plug in stub intel_validate_framebuffer() functionBrian Paul2009-01-221-0/+14
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* intel: inline some renderbuffer functionsBrian Paul2009-01-222-55/+52
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* mesa: regenerated GL API filesBrian Paul2009-01-221-69/+121
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* i915: Add decode for PS in batchbuffers.Eric Anholt2009-01-212-6/+483
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* i965: Remove gratuitous whitespace in INTEL_DEBUG=wm output.Eric Anholt2009-01-214-5/+8
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* i965: Use _mesa_num_inst_src_regs() instead of keeping a copy of its contents.Eric Anholt2009-01-211-48/+6
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* [intel] Remove remaining references to intel_wait_flips().Kristian Høgsberg2009-01-211-5/+1
| | | | Oops.
* [intel] Go back to using the typedef for the sarea structmesa_7_3_rc3Timo Aaltonen2009-01-204-8/+8
| | | | | | The upstream linux kernel headers and libdrm kernel headers disagree on the tag name for the sarea struct: _drm_i915_sarea vs drm_i915_sarea. They both typedef it to drm_i915_sarea_t though, so just use that.
* Remove intel pageflipping support in its entirety.Owain G. Ainsworth2009-01-205-328/+20
| | | | | | | | It's been broken and deprecated for a while, so it's time to die. This has the wonderful benefit of cleaning up the code a fair amount; making it marginally less twisty. I'm unsure if the for loops in IntelWindowMoved are still needed.
* dri1: Add a macro to validate two dri drawables in one go.Thomas Hellstrom2009-01-201-0/+22
| | | | | | | | Dri drivers often may validate first a write drawable and then a read drawable ("readable"). However, the hardware lock may be unlocked when validating the readable, causing the write drawable status to be stale. Drivers should use this macro instead when validating two drawables.
* mesa: fix build of stand-alone glslcompiler driverBrian Paul2009-01-191-1/+1
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* i965: fix polygon culling bug when rendering to a texture/FBOBrian Paul2009-01-161-12/+13
| | | | | | Since we use an inverted viewport transformation for render to texture, that inverts front/back polygon orientation. Now glCullFace(GL_FRONT / GL_BACK) works correctly.
* intel: added intel_rendering_to_texture() helper function.Brian Paul2009-01-161-0/+17
| | | | | When we're rendering to textures we have to invert the viewport transformation. This helper cleans up that test and can be used elsewhere...
* i915: fallback on transfer modeXiang, Haihao2009-01-161-0/+6
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* windows: updated mesa.def fileKarl Schultz2009-01-151-0/+5
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* r300: work-around FRAG_BIT_FOGC warning/errorBrian Paul2009-01-142-0/+12
| | | | | | | See bug 17929. Fog doesn't actually work, but the often complained about warning is silenced.
* i965: asst. fixes, work-arounds for FBOs and render to textureBrian Paul2009-01-143-2/+21
| | | | | | | | | | | | | | OpenGL allows mixing and matching depth and stencil renderbuffers in framebuffer objects while the hardware really only supports interleaved depth/stencil buffers. This makes for some tricky buffer management. An extra wrinkle is the situation where the user allocates a 16bpp depth texture or renderbuffer then tries to render to it along with a stencil buffer. We'd have to promote the 16bpp Z values to 24-bit Z values and mix in the stencil values to setup the depth/stencil renderbuffer. There's no support for that now, so always allocate 32bpp depth textures/ renderbuffers for now.
* i965: fix incorrect renderbuffer DataType assignmentBrian Paul2009-01-141-2/+6
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* i965: fix some FBO depth/stencil assertionsBrian Paul2009-01-141-2/+5
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* intel: SW fallback maps texture images, not texture coordinatesIan Romanick2009-01-141-2/+2
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* i965: indentation fixesBrian Paul2009-01-142-9/+15
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* i965: allow larger AA points on fallback pathBrian Paul2009-01-141-0/+3
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* i965: fix indentationBrian Paul2009-01-141-5/+6
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* i965: comment for emit_kil()Brian Paul2009-01-141-0/+4
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* i965: fix indentationBrian Paul2009-01-141-7/+7
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* intel: bump driver dateXiang, Haihao2009-01-141-1/+1
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* windows: try to create a context in wglCreateLayerContext()Karl Schultz2009-01-131-1/+2
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* i965: fix glDrawPixels Z coordinate in intel_texture_drawpixels().Brian Paul2009-01-121-4/+8
| | | | As for glBitmap, it needs to be an NDC coord in [-1,1].
* i965: fix broken glBitmap + depth testBrian Paul2009-01-121-4/+16
| | | | | | | | | When we use the do_blit_bitmap() function, it seems the fragment Z is always 1.0. If depth testing is on, that means that bitmap fragments are often occluded by other rendering. So, the bitmap doesn't appear even if rasterpos.Z==0. The fix is to use the intel_texture_bitmap() path when depth testing is on. Also, fix the incorrect Z coordinate. It needs to be an NDC value in [-1,1].
* i965: fix broken ARB fp fog optionsBrian Paul2009-01-122-52/+6
| | | | | | | Just call _mesa_append_fog_code() if the fragment program's FogOption is not GL_NONE. This allows us to remove some unnecessary i965 fog code. Note, the arbfplight.c demo can be used to test this (see DO_FRAGMENT_FOG).
* build fix on big endian OpenBSD architectures.Matthieu Herrb2009-01-111-0/+6
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* replace nearbyint() by rint() for now.Matthieu Herrb2009-01-111-1/+1
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* mesa: deprecate GL/amesa.h header (allegro driver)Brian Paul2009-01-102-1/+66
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* mesa: deprecate the GL/fxmesa.h headerBrian Paul2009-01-102-1/+104
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* xmesa: deprecate the "XMesa" interfaceBrian Paul2009-01-107-4/+709
| | | | | Move the include/GL/xmesa*.h files to src/mesa/drivers/x11/ so they're no longer considered public.
* swrast: Fix GL_ATI_separate_stencilIan Romanick2009-01-091-0/+2
| | | | | | GL_ATI_separate_stencil is enabled by default for software rasterizers, but the extension functions weren't hooked up to the dispatch table.
* i965: Fix GLSL FS DPH to return the right value instead of src0.w * src1.w.Eric Anholt2009-01-071-1/+1
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* i965: Remove worrisome comment about _NEW_PROGRAM signaling fp change.Eric Anholt2009-01-071-4/+0
| | | | | Everything now depends on either BRW_NEW_FRAGMENT_PROGRAM or BRW_NEW_VERTEX_PROGRAM.
* mesa: Remove _Active and _UseTexEnvProgram flags from fragment programs.Eric Anholt2009-01-073-25/+3
| | | | | | | | There was a note in state.c about _Active deserving to die, and there were potential issues with it due to i965 forgetting to set _UseTexEnvProgram. Removing both simplifies things. Reviewed-by: Brian Paul <[email protected]>
* i965: Remove dead brw_vs_tnl.cEric Anholt2009-01-073-61/+0
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* i965: allow gl_FragData[0] usage when there's only one color bufferBrian Paul2009-01-071-2/+9
| | | | If gl_FragData[0] is written but not gl_FragCOlor, use the former.
* i965: init dst reg RelAddr field to zeroBrian Paul2009-01-071-1/+2
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* i965: Note when we drop saturate mode on the floor in a VP.Eric Anholt2009-01-071-0/+5
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* i965: Add support for LRP in VPs.Eric Anholt2009-01-071-0/+42
| | | | Bug #19226.
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