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path: root/src/mesa/drivers
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* i965/fs: Use regs_read/written for post-RA scheduling in calculate_depsJason Ekstrand2015-11-071-11/+4
* i965/nir/fs: Add comment for no-op memory barrier functionsFrancisco Jerez2015-11-061-0/+19
* i965/nir/fs: Implement new barrier functions for compute shadersJordan Justen2015-11-061-0/+7
* i965: Fix scalar VS float[] and vec2[] output arrays.Kenneth Graunke2015-11-054-2/+17
* i965/fs: Do not mark used surfaces in FS_OPCODE_GET_BUFFER_SIZEIago Toral Quiroga2015-11-052-4/+4
* i965/vec4: Do not mark used surfaces in VS_OPCODE_GET_BUFFER_SIZEIago Toral Quiroga2015-11-052-5/+5
* i965/vec4: Do not mark used direct surfaces in VS_OPCODE_PULL_CONSTANT_LOADIago Toral Quiroga2015-11-053-13/+8
* i965/fs: Do not mark used direct surfaces in UNIFORM_PULL_CONSTANT_LOADIago Toral Quiroga2015-11-052-11/+1
* i965/fs: Do not mark direct used surfaces in VARYING_PULL_CONSTANT_LOADIago Toral Quiroga2015-11-053-13/+8
* i965/skl+: Enable support for 16x multisamplingNeil Roberts2015-11-052-1/+10
* mesa/meta: Use interpolateAtOffset for 16x MSAA copy blitNeil Roberts2015-11-051-2/+37
* meta/blit: Always try to enable GL_ARB_sample_shadingNeil Roberts2015-11-051-14/+2
* meta: Support 16x MSAA in the multisample scaled blit shaderNeil Roberts2015-11-053-10/+35
* i965/meta: Support 16x MSAA in the meta stencil blitNeil Roberts2015-11-051-5/+17
* i965/fs/skl+: Fix calculating gl_SampleID for 16x MSAANeil Roberts2015-11-051-1/+7
* i965: Support allocating the MCS buffer for 16x MSAANeil Roberts2015-11-051-0/+6
* i965: Support calculating the bits needed to set up 16x MSAANeil Roberts2015-11-051-1/+1
* i965/fs: Add a sampler program key for whether the texture is 16x MSAANeil Roberts2015-11-053-1/+16
* i965/vec4/skl+: Use ld2dms_w instead of ld2dmsNeil Roberts2015-11-053-2/+18
* i965/fs/skl+: Use ld2dms_w instead of ld2dmsNeil Roberts2015-11-056-5/+60
* i965: Program 16x MSAA sample positions.Neil Roberts2015-11-053-7/+34
* i965: Handle 16x MSAA in IMS dimension munging code.Kenneth Graunke2015-11-051-2/+6
* i965/vec4: select predicate based on writemask for sel emissionsAlejandro Piñeiro2015-11-051-1/+17
* i965: check inst->predicate when clearing flag_live at dead code eliminateAlejandro Piñeiro2015-11-042-2/+2
* i965/meta: Assert fast clears and rep clears never overlapBen Widawsky2015-11-031-0/+2
* i965: enable ARB_arrays_of_arraysTimothy Arceri2015-11-041-0/+1
* i965: add support for image AoATimothy Arceri2015-11-042-14/+18
* i965/vec4: Send from GRF in atomic operations.Matt Turner2015-11-031-12/+18
* i965: Add scalar geometry shader support.Kenneth Graunke2015-11-035-24/+666
* i965: Add scalar GS input lowering code.Kenneth Graunke2015-11-031-5/+39
* i965: Fix the fs_visitor GS constructor to take shader_time_index.Kenneth Graunke2015-11-032-3/+5
* i965/gen8+: Extract color clear surface stateBen Widawsky2015-11-031-6/+15
* i965/gen8+: Remove redundant zeroing of surface stateBen Widawsky2015-11-031-12/+0
* i965/skl: Add GT4 PCI IDsBen Widawsky2015-11-031-1/+5
* i965/fs: Clean up FBH code.Matt Turner2015-11-021-4/+3
* i965/vec4: Clean up FBH code.Matt Turner2015-11-021-13/+5
* i965: Replace default case with list of enum values.Matt Turner2015-11-025-26/+29
* i965/vec4: Don't disable channels in any/all comparisons.Matt Turner2015-11-021-42/+10
* nouveau: set MaxDrawBuffers to the same value as MaxColorAttachmentsIlia Mirkin2015-11-011-1/+1
* i965: Setup pull constant state for compute programsJordan Justen2015-11-014-1/+35
* i965/sched: don't calculate live intervals for post-RA schedulingConnor Abbott2015-10-311-1/+2
* i965: Do legacy userclipping in OpenGL ES 1.x contexts.Ian Romanick2015-10-301-1/+2
* i965: enable ARB_shader_clock on gen7+Emil Velikov2015-10-301-0/+1
* i965: Implement nir_intrinsic_shader_clockEmil Velikov2015-10-302-0/+19
* i965/fs: move the fs_reg::smear() from get_timestamp() to the callersEmil Velikov2015-10-301-12/+17
* i965: Fix invalid memory accesses after resizing brw_codegen's store tableKristian Høgsberg2015-10-301-4/+13
* i965/sched: use liveness analysis for computing register pressureConnor Abbott2015-10-301-56/+229
* i965/fs: split out calculation of payload live rangesConnor Abbott2015-10-302-22/+31
* i965: dump scheduling cycle estimatesConnor Abbott2015-10-304-10/+36
* i965: always run the post-RA schedulerConnor Abbott2015-10-301-2/+1
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