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* mesa/dri: always link against shared glapiEmil Velikov2017-05-121-7/+9
* i965/vec4: don't modify regioning parameters to the sources of DF align1 inst...Samuel Iglesias Gonsálvez2017-05-121-8/+1
* i965/vec4: fix register width for DF VGRF and UNIFORMSamuel Iglesias Gonsálvez2017-05-121-5/+7
* i965/vec4: fix vertical stride to avoid breaking region parameter ruleSamuel Iglesias Gonsálvez2017-05-121-16/+30
* i965/vec4: Avoid reswizzling MACH instructions in opt_register_coalesce().Kenneth Graunke2017-04-261-0/+7
* intel/fs: Take into account amount of data read in spilling cost heuristic.Francisco Jerez2017-04-261-1/+1
* intel/fs: Use regs_written() in spilling cost heuristic for improved accuracy.Francisco Jerez2017-04-261-2/+1
* i965: Set kernel features before computing max GL version.Kenneth Graunke2017-04-121-24/+24
* i965: Skip register write detection when possible.Kenneth Graunke2017-04-121-2/+8
* i965: Set screen->cmd_parser_version to 0 if we can't write registers.Kenneth Graunke2017-04-121-6/+11
* i965: Document the sad story of the kernel command parser.Kenneth Graunke2017-04-121-0/+97
* i965/blorp: Bump the batch space estimateJason Ekstrand2017-04-121-1/+1
* i965/blorp: Align vertex buffers to 64BJason Ekstrand2017-04-121-1/+13
* i965/fs: Always provide a default LOD of 0 for TXS and TXLJason Ekstrand2017-04-121-9/+9
* i965/fs: Don't emit SEL instructions for type-converting MOVs.Matt Turner2017-03-291-0/+2
* i965: Fall back to GL 4.2/4.3 on Haswell if the kernel isn't new enough.Kenneth Graunke2017-03-291-2/+9
* intel: Correct the BDW surface state sizeNanley Chery2017-03-291-3/+2
* i965/gen8+: Do full stall when switching pipelineTopi Pohjolainen2017-03-291-1/+2
* i965: move brw_define.h ifndef guard to the topEmil Velikov2017-03-161-3/+3
* i965/fs: emit MOV_INDIRECT with the source with the right register typeSamuel Iglesias Gonsálvez2017-03-151-1/+1
* i965/fs: fix source type when emitting MOV_INDIRECT to read ICP handlesSamuel Iglesias Gonsálvez2017-03-151-3/+3
* i965/fs: fix indirect load DF uniforms on BSW/BXTSamuel Iglesias Gonsálvez2017-03-151-21/+20
* i965/fs: detect different bit size accesses to uniforms to push them in prope...Samuel Iglesias Gonsálvez2017-03-151-16/+34
* i965/fs: mark last DF uniform array element as 64 bit live oneSamuel Iglesias Gonsálvez2017-03-151-0/+3
* intel/blorp: Explicitly flush all allocated stateJason Ekstrand2017-03-011-0/+8
* i965/fs: fix uninitialized memory accessLionel Landwerlin2017-03-011-3/+2
* i965/fs: Fix the inline nir_op_pack_double optimizationJason Ekstrand2017-03-011-29/+0
* i965/sampler_state: Set the "Base Mip Level" field on Sandy BridgeJason Ekstrand2017-02-232-1/+20
* i965/sampler_state: Pass texObj into update_sampler_stateJason Ekstrand2017-02-231-6/+4
* i965/sampler_state: Clamp min/max LOD to 14 on gen7+Jason Ekstrand2017-02-231-2/+5
* Revert "i965: Disable guardband clipping in the smaller-than-viewport case."Kenneth Graunke2017-02-101-31/+0
* i965: Always scissor on Gen6-7.5 instead of disabling guardband.Kenneth Graunke2017-02-103-48/+5
* i965: Use a better guardband calculation.Jason Ekstrand2017-02-104-82/+126
* i965: Combine the Gen6 SF and Clip viewport atoms.Kenneth Graunke2017-02-103-57/+30
* dri/common: clear the loaderPrivate pointer in driDestroyDrawableNicolai Hähnle2017-02-101-0/+12
* i965: Support the force_glsl_version driconf option.Kenneth Graunke2017-02-032-0/+4
* i965: Fix check for negative pitch in can_do_fast_copy_blit().Kenneth Graunke2017-02-031-6/+4
* i965: Unbind deleted shaders from brw_context, fixing malloc heisenbug.Kenneth Graunke2017-02-031-0/+43
* dri/osmesa: automake: include builddir prior to srcdirEmil Velikov2017-02-031-1/+1
* dri/swrast: automake: include builddir prior to srcdirEmil Velikov2017-02-031-1/+1
* radeon, r200: automake: include builddir prior to srcdirEmil Velikov2017-02-032-2/+2
* i915: automake: include builddir prior to srcdirEmil Velikov2017-02-031-1/+1
* i965: automake: include builddir prior to srcdirEmil Velikov2017-02-031-3/+3
* i965: automake: correctly set MKDIR_GENEmil Velikov2017-02-031-0/+1
* i965: Make intelEmitCopyBlit not truncate large strides.Kenneth Graunke2017-02-032-11/+7
* i965: Use a UW source type for CS_OPCODE_CS_TERMINATE.Kenneth Graunke2017-02-031-1/+1
* i965: Fix fast depth clears for surfaces with a dimension of 16384.Kenneth Graunke2017-02-031-0/+12
* i965/blorp: Use the correct ISL format for combined depth/stencilJason Ekstrand2017-02-031-0/+2
* i965/blorp: Add also depth and stencil buffers to render cacheTopi Pohjolainen2017-02-031-0/+4
* i965/blorp: Make post draw flush more explicitTopi Pohjolainen2017-01-242-5/+22
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