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* i915: Remove (mostly) unused IS_915 macroIan Romanick2015-03-091-5/+3
| | | | | | | | Inspired by Damien's recent libdrm changes. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Damien Lespiau <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i915: Remove (mostly) unused IS_PNV, IS_PNVG, and IS_PNVGM macrosIan Romanick2015-03-091-5/+3
| | | | | | | | Inspired by Damien's recent libdrm changes. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Damien Lespiau <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i915: Remove IS_9XX macroIan Romanick2015-03-092-5/+2
| | | | | | | | | Since the i915 / i965 split, IS_9XX just means IS_GEN3. Inspired by Damien's recent libdrm changes. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Damien Lespiau <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i915: Remove unused IS_MOBILE macroIan Romanick2015-03-091-10/+0
| | | | | | | | Inspired by Damien's recent libdrm changes. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Damien Lespiau <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Don't write past the end of the application supplied bufferIan Romanick2015-03-091-7/+12
| | | | | | | | | | | | | | | | | | | | | | Both the AMD and Intel APIs provide a dataSize parameter, and this function would merrily ignore it. Neither API specifies what to do when the buffer isn't big enough. I take the easy route of writing all the complete bits of data that will fit. With more complete specs, we could probably do something different. I noticed this while looking into an unused parameter warning. The warning was actually useful! brw_performance_monitor.c: In function 'brw_get_perf_monitor_result': brw_performance_monitor.c:1261:37: warning: unused parameter 'data_size' [-Wunused-parameter] GLsizei data_size, ^ v2: Fix checks to include offset in the calculation. Noticed by Jan. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jan Vesely <[email protected]>
* i965: Silence unused parameter warningIan Romanick2015-03-091-0/+1
| | | | | | | | | | | | | | All dd functions take a gl_context as the first parameter. Instead of removing it, just silence the warning. brw_performance_monitor.c: In function 'brw_new_perf_monitor': brw_performance_monitor.c:1354:41: warning: unused parameter 'ctx' [-Wunused-parameter] brw_new_perf_monitor(struct gl_context *ctx) ^ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Carl Worth <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Silence many 'static' is not at beginning of declaration warningsIan Romanick2015-03-091-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | What a useful warning. #ThanksGCC brw_performance_monitor.c:153:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration] const static struct gl_perf_monitor_counter gen5_raw_chaps_counters[] = { ^ brw_performance_monitor.c:185:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration] const static int gen5_oa_snapshot_layout[] = ^ brw_performance_monitor.c:221:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration] const static struct gl_perf_monitor_group gen5_groups[] = { ^ brw_performance_monitor.c:240:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration] const static struct gl_perf_monitor_counter gen6_raw_oa_counters[] = { ^ brw_performance_monitor.c:281:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration] const static int gen6_oa_snapshot_layout[] = ^ brw_performance_monitor.c:317:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration] const static struct gl_perf_monitor_counter gen6_statistics_counters[] = { ^ brw_performance_monitor.c:332:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration] const static int gen6_statistics_register_addresses[] = { ^ brw_performance_monitor.c:346:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration] const static struct gl_perf_monitor_group gen6_groups[] = { ^ brw_performance_monitor.c:356:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration] const static struct gl_perf_monitor_counter gen7_raw_oa_counters[] = { ^ brw_performance_monitor.c:402:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration] const static int gen7_oa_snapshot_layout[] = ^ brw_performance_monitor.c:470:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration] const static struct gl_perf_monitor_counter gen7_statistics_counters[] = { ^ brw_performance_monitor.c:493:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration] const static int gen7_statistics_register_addresses[] = { ^ brw_performance_monitor.c:515:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration] const static struct gl_perf_monitor_group gen7_groups[] = { ^ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Carl Worth <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/fs: Silence unused parameter warningIan Romanick2015-03-091-2/+2
| | | | | | | | | | | | I don't this opt_cmod_propagation_local ever used the fs_visitor. brw_fs_cmod_propagation.cpp:52:40: warning: unused parameter 'v' [-Wunused-parameter] opt_cmod_propagation_local(fs_visitor *v, bblock_t *block) ^ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/fs: Silence unused parameter warningIan Romanick2015-03-091-8/+4
| | | | | | | | | | | | Unused since b18fd23. brw_fs.cpp:2878:44: warning: unused parameter 'dispatch_width' [-Wunused-parameter] clear_deps_for_inst_src(fs_inst *inst, int dispatch_width, bool *deps, ^ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/fs: Silence unused parameter warningIan Romanick2015-03-094-7/+5
| | | | | | | | | brw_fs_visitor.cpp:2162:56: warning: unused parameter 'offset_components' [-Wunused-parameter] fs_reg offset_value, unsigned offset_components, ^ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/fs: Implement SIMD16 dual source blending.Iago Toral Quiroga2015-03-095-19/+83
| | | | | | | | | | | | From the SNB PRM, volume 4, part 1, page 193: "The dual source render target messages only have SIMD8 forms due to maximum message length limitations. SIMD16 pixel shaders must send two of these messages to cover all of the pixels. Each message contains two colors (4 channels each) for each pixel in the message payload." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82831 Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Plumb the shader stage into glsl_to_nir().Kenneth Graunke2015-03-081-1/+1
| | | | | | | | | The next commit needs to know the shader stage in glsl_to_nir(). To facilitate that, we pass the gl_shader rather than the raw exec_list of instructions. This has both the exec_list and the stage. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Add native_integers to nir_shader_compiler_options.Kenneth Graunke2015-03-082-2/+4
| | | | | | | | | | | glsl_to_nir, tgsi_to_nir, and prog_to_nir all want to know whether the driver supports native integers. Presumably other passes may as well. Adding this to nir_shader_compiler_options is an easy way to provide that information, as it's accessible via nir_shader::options. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Try to make sense of the nir_shader_compiler_options code.Kenneth Graunke2015-03-082-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | The code in glsl_to_nir is entirely dead, as we translate from GLSL to NIR at link time, when there isn't a _mesa_glsl_parse_state to pass, so every caller passes NULL. glsl_to_nir seems like the wrong place to try and create the shader compiler options structure anyway - tgsi_to_nir, prog_to_nir, and other translators all would have to duplicate that code. The driver should set this up once with whatever settings it wants, and pass it in. Eric also added a NirOptions field to ctx->Const.ShaderCompilerOptions[] and left a comment saying: "The memory for the options is expected to be kept in a single static copy by the driver." This suggests the plan was to do exactly that. That pointer was not marked const, however, and the dead code used a mix of static structures and ralloced ones. This patch deletes the dead code in glsl_to_nir, instead making it take the shader compiler options as a mandatory argument. It creates an (empty) options struct in the i965 driver, and makes NirOptions point to that. It marks the pointer const so that we can actually do so without generating "discards const qualifier" compiler warnings. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/nir: Resolve source modifiers on Gen8+ logic operations.Kenneth Graunke2015-03-083-0/+27
| | | | | | | | | | | On Gen8+, AND/OR/XOR/NOT don't support the abs() source modifier, and negate changes meaning to bitwise-not (~, not -). This isn't what NIR expects, so we should resolve the source modifers via a MOV. +30 Piglits (fs-op-bit{and,or,xor}-not-abs-*). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i915: Fix GCC unused-variable warning in release build.Vinson Lee2015-03-061-2/+1
| | | | | | | | | | i915_debug_fp.c: In function ‘i915_disassemble_program’: i915_debug_fp.c:302:11: warning: unused variable ‘size’ [-Wunused-variable] GLuint size = program[0] & 0x1ff; ^ Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* i965: free scratch buffers when destroying the contextIago Toral Quiroga2015-03-061-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | If scratch space is needed for a shader stage we try to reuse the last scratch buffer bound to that stage. If we can't, we free the old scratch buffer and allocate a new one. This means we always keep the last scratch buffer for a particular shader stage around for the entire life span of the context. These buffers are being reported by Valgrind as definitely lost after destroying the OpenGL context. For example, for the geometry shader stage: ==18350== 248 bytes in 1 blocks are definitely lost in loss record 85 of 150 ==18350== at 0x4C2CC70: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) ==18350== by 0xA1B35D6: drm_intel_gem_bo_alloc_internal (intel_bufmgr_gem.c:724) ==18350== by 0xA1B383F: drm_intel_gem_bo_alloc (intel_bufmgr_gem.c:794) ==18350== by 0xA1AEFA3: drm_intel_bo_alloc (intel_bufmgr.c:52) ==18350== by 0x9D08E31: brw_get_scratch_bo (brw_program.c:226) ==18350== by 0x9D2A0F2: do_gs_prog (brw_vec4_gs.c:280) ==18350== by 0x9D2A635: brw_gs_precompile (brw_vec4_gs.c:401) ==18350== by 0x9D14F68: brw_shader_precompile(gl_context*, gl_shader_program*) (brw_shader.cpp:76) ==18350== by 0x9D157B8: brw_link_shader (brw_shader.cpp:269) ==18350== by 0x9B0941E: _mesa_glsl_link_shader (ir_to_mesa.cpp:3038) ==18350== by 0x99AE4ED: link_program (shaderapi.c:917) ==18350== by 0x99AF365: _mesa_LinkProgram (shaderapi.c:1385) So make sure that by the time we destroy the context we check if we have live scratch buffers for the various stages and release them if that is the case. Reviewed-by: Jordan Justen <[email protected]>
* i965: Fix URB size for CHVVille Syrjälä2015-03-061-1/+1
| | | | | | | | Increase the device info .urb.size for CHV to match the default URB size (192kB). Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
* i965/vec4: Don't lose the saturate modifier in copy propagation.Andrey Sudnik2015-03-051-1/+1
| | | | | | | Cc: 10.4, 10.5 <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89224 Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/vec4: Handle saturate in dump_instruction().Matt Turner2015-03-051-0/+2
| | | | Reviewed-by: Ian Romanick <[email protected]>
* i965: Split Gen4-5 BlitFramebuffer code; prefer BLT over Meta.Kenneth Graunke2015-03-051-1/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | A while back I switched intel_blit_framebuffer to prefer Meta over the BLT. This meant that Gen8 platforms would start using the 3D engine for blits, just like we do on Gen6-7.5. However, I hadn't considered Gen4-5 when making that change. The BLT engine appears to be substantially faster on 965GM than using Meta to drive the 3D engine. This isn't too surprising: original Gen4 doesn't support tile offsets (that came on G45), and the level/layer fields don't work for cubemap rendering, so for inconvenient miplevel alignments, we end up blitting or copying data to/from temporaries in order to render to it. We may as well just use the blitter. I chose to use the BLT on Gen4-5 because they use the same ring for both 3D and BLT; Gen6+ splits it out. Fixes regressions on 965GM due to botched tile offset code (we should fix those properly as well, but they're longstanding bugs - for now, put things back to the status quo). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89430 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Cc: "10.5" <[email protected]>
* Fix invalid extern "C" around header inclusion.Mark Janes2015-03-059-18/+15
| | | | | | | | | | | System headers may contain C++ declarations, which cannot be given C linkage. For this reason, include statements should never occur inside extern "C". This patch moves the C linkage statements to enclose only the declarations within a single header. Reviewed-by: Jose Fonseca <[email protected]>
* i965: Tell intel_get_memcpy() which direction the memcpy() is going.Matt Turner2015-03-055-42/+106
| | | | | | | | | | | | | | | | | | | | | | The SSSE3 swizzling code was written for fast uploads to the GPU and assumed the destination was always 16-byte aligned. When we began using this code for fast downloads as well we didn't do anything to account for the fact that the destination pointer given by glReadPixels() or glGetTexImage() is not guaranteed to be suitably aligned. With SSSE3 enabled (at compile-time), some applications would crash when an SSE aligned-store instruction tried to store to an unaligned destination (or an assertion that the destination is aligned would trigger). To remedy this, tell intel_get_memcpy() whether we're uploading or downloading so that it can select whether to assume the destination or source is aligned, respectively. Cc: 10.5 <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89416 Tested-by: Uriy Zhuravlev <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* xmlpool: make sure we ship options.hEmil Velikov2015-03-051-1/+1
| | | | | | | | | | | | The header is included in ../xmlpool.h. With the latter of which used directly in a number of places in mesa. Note that we can also add it (alongside t_option.h) to noinst_HEADERS, but neither solution fixes the issue that brough us here - namely: Do not regenerate the headers, if it already exists. Cc: "10.5" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* osmesa: include stdio.hBrian Paul2015-03-051-0/+1
| | | | | Acked-by: Matt Turner <[email protected]> Reviewed-by: José Fonseca <[email protected]>
* xlib: include stdio.hBrian Paul2015-03-054-1/+4
| | | | | Acked-by: Matt Turner <[email protected]> Reviewed-by: José Fonseca <[email protected]>
* swrast: include stdio.h where neededBrian Paul2015-03-051-0/+1
| | | | | Acked-by: Matt Turner <[email protected]> Reviewed-by: José Fonseca <[email protected]>
* nouveau: include stdio.h where neededBrian Paul2015-03-053-0/+3
| | | | | Acked-by: Matt Turner <[email protected]> Reviewed-by: José Fonseca <[email protected]>
* dri/common: include stdio.h where neededBrian Paul2015-03-052-0/+2
| | | | | Acked-by: Matt Turner <[email protected]> Reviewed-by: José Fonseca <[email protected]>
* meta: Fix the y offset for 1D_ARRAY in _mesa_meta_pbo_TexSubImageNeil Roberts2015-03-051-0/+8
| | | | | | | | | The yoffset needs to be interpreted as a slice offset for 1D array textures. This patch implements that by moving the yoffset into zoffset similar to how it moves the height into depth. Reviewed-by: Jason Ekstrand <[email protected]> Cc: "10.5" <[email protected]>
* meta: Allow GL_UN/PACK_IMAGE_HEIGHT in _mesa_meta_pbo_Get/TexSubImageNeil Roberts2015-03-051-12/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that a layered source PBO is interpreted as a single tall 2D image it's quite easy to accept the image height packing option by just creating an image that is tall enough to include the image padding. I'm not sure whether the image height property should affect 1D_ARRAY textures. My intuition and interpretation of the GL spec (which is a bit vague) would be that it shouldn't. However the software fallback path in Mesa uses the property for packing but not for unpacking. The binary NVidia driver uses it for both. This patch doesn't use it for either case so it is different from the software fallback. There is some discussion about this here: http://lists.freedesktop.org/archives/mesa-dev/2015-February/077925.html This is tested by the texsubimage Piglit test with the array and pbo arguments. Previously this test was skipping this code path because it always sets the image height. I've also tested it by modifying the getteximage-targets test. It wasn't using this code path before because it was using the default texture object so this code couldn't successfully create a frame buffer. I also modified it to add some image padding with the image height in the PBO. Reviewed-by: Jason Ekstrand <[email protected]> Cc: "10.5" <[email protected]>
* Revert "common: Fix PBOs for 1D_ARRAY."Neil Roberts2015-03-051-36/+26
| | | | | | | | | | | | | | | | | | This reverts commit 546aba143d13ba3f993ead4cc30b2404abfc0202. I think the changes to the calls to glBlitFramebuffer from this patch are no different to what it was doing previously because it used to set height to 1 before doing the blits. However it was introducing some problems with the blit for layer 0 because this was no longer special cased. It didn't fix problems with the yoffset which needs to be interpreted as a slice offset. I think a better solution would be to modify the original if statement to cope with the yoffset. Conflicts: src/mesa/drivers/common/meta_tex_subimage.c Cc: "10.5" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Don't propagate cmod to inst with different type.Matt Turner2015-03-042-0/+38
| | | | | | Cc: 10.5 <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89317 Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix uint64_t overflow in intel_client_wait_sync()Kristian Høgsberg2015-03-041-0/+8
| | | | | | | | | | | | DRM_IOCTL_I915_GEM_WAIT takes an int64_t for the timeout value but GL_ARB_sync takes an uint64_t. Further, the ioctl used to wait indefinitely when passed a negative timeout, but it's been broken and now returns immediately in that case. Thus, if an application passes UINT64_MAX to wait forever, we overflow to -1LL and return immediately. Work around this mess by clamping the wait timeout to INT64_MAX. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* windows/gdi: Remove.Jose Fonseca2015-03-047-1980/+0
| | | | | | | | | | | | This classic driver is so far behind Gallium softpipe/llvmpipe based one, that's hard to imagine ever being useful. v2: Drop drivers/windows from src/mesa/Makefile.am:EXTRA_DIST per Emil Velikov. Reviewed-by: Emil Velikov <[email protected]> v3: Update release notes.
* intel: fix EGLImage renderbuffer _BaseFormatFrank Henigman2015-03-032-3/+2
| | | | | | | | | | Correctly set _BaseFormat field when creating a gl_renderbuffer with EGLImage storage. Change-Id: I8c9f7302d18b617f54fa68304d8ffee087ed8a77 Signed-off-by: Frank Henigman <[email protected]> Reviewed-by: Stéphane Marchesin <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Fix assertion in brw_reg_type_lettersBen Widawsky2015-03-021-1/+1
| | | | | | | | | | | | | | | | | While using various debugging features (optimization debug, instruction dumping, etc) this function is called in order to get a readable letter for the type of unit. On GEN8, two new units were added, the Qword and the Unsigned Qword (Q, and UQ respectively). The existing assertion tries to determine that the argument passed in is within the correct boundary, however, it was using UQ as the upper limit instead of Q. To my knowledge you can only hit this case with the branch I am currently working on, so it doesn't fix any known issues. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Rename some PIPE_CONTROL flagsBen Widawsky2015-03-025-14/+14
| | | | | | | | | | | | | | I'm not really sure of the origins of the existing flag names. Modern docs have some slightly different names. Having the correct names makes it easier to determine if existing PIPE_CONTROL flag settings are correct, as well as making adding new PIPE_CONTROLs easier. This originally came up while I was trying to implement workarounds and spotted some things called, "flush" which should have been called "invalidate." Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Don't use backend_visitor::instructions after creating the CFG.Matt Turner2015-03-021-10/+0
| | | | | | | | | | | | | | | | | | | | This is a fix for a regression introduced in commit a9f8296d ("i965/fs: Preserve the CFG in a few more places."). The errata this code works around is described in a comment before the function: "[DevBW, DevCL] Errata: A destination register from a send can not be used as a destination register until after it has been sourced by an instruction with a different destination register. The framebuffer write's sources must be in message registers, which SEND instructions cannot have as a destination. There's no way for this errata to affect anything at the end of the program. Just remove the code. Cc: 10.4, 10.5 <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84613 Reviewed-by: Kenneth Graunke <[email protected]>
* meta/TexSubImage: Stash everything other than PIXEL_TRANSFER/store in meta_beginJason Ekstrand2015-03-021-4/+4
| | | | | | | | | | | Previously, there were bugs where if the app set a scissor it could affect the area of the texture that was downloaded. There was also potential that the framebuffer SRGB state could affect downloads. This ensures that those will get saved/restored and can't affect the texture download. Cc: 10.5 <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89292 Reviewed-by: Neil Roberts <[email protected]>
* i915: Remove hand-rolled memcpy implementation.Matt Turner2015-03-022-29/+1
| | | | Reviewed-by: Eric Anholt <[email protected]>
* i965: Remove hand-rolled memcpy implementation.Matt Turner2015-03-022-28/+1
| | | | Reviewed-by: Eric Anholt <[email protected]>
* i965: Consider scratch writes to have side effects.Matt Turner2015-03-021-0/+1
| | | | | | | | We could do better by tracking scratch reads and writes. Cc: 10.5 <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88793 Reviewed-by: Jason Ekstrand <[email protected]>
* radeon: replace Elements() with ARRAY_SIZE()Brian Paul2015-03-021-10/+10
| | | | Acked-by: Ilia Mirkin <[email protected]>
* r200: replace Elements() with ARRAY_SIZE()Brian Paul2015-03-021-10/+10
| | | | Acked-by: Ilia Mirkin <[email protected]>
* nouveau: replace Elements() with ARRAY_SIZE()Brian Paul2015-03-021-4/+4
| | | | Acked-by: Ilia Mirkin <[email protected]>
* i965: replace Elements() with ARRAY_SIZE()Brian Paul2015-03-025-8/+8
| | | | Acked-by: Ilia Mirkin <[email protected]>
* i915: replace Elements() with ARRAY_SIZE()Brian Paul2015-03-021-1/+1
| | | | Acked-by: Ilia Mirkin <[email protected]>
* i965: Remove the create_raw_surface vtbl hook.Francisco Jerez2015-03-025-47/+8
| | | | | | | | It's a wrapper around emit_buffer_surface_state with format=RAW, pitch=1, rw=true and the remaining arguments ordered differently. There's no point in having a separate vtbl pointer for that. Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: Add missing defines for render cache messages.Francisco Jerez2015-03-022-2/+8
| | | | | | And remove duplicated definition of OWORD_DUAL_BLOCK_WRITE. Reviewed-by: Paul Berry <[email protected]>
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