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| | * intel: Also update stencil bits in intel_update_wrapper().Michel Dänzer2009-07-031-0/+1
| | * i915: Fix assertion failure on remapping a non-BO-backed VBO.Eric Anholt2009-06-301-1/+4
| * | radeon: Wait for BO idle if necessary before mapping it.Michel Dänzer2009-07-031-0/+2
| * | r300: Guard debugging output.Michel Dänzer2009-07-031-2/+3
| * | intel: Fall back on glBitmap with fog enabled.Eric Anholt2009-07-021-0/+6
| * | intel: Flush when mapping buffer objects so writes don't get reordered.Eric Anholt2009-07-022-0/+5
| * | intel: Fix leak of DRI option info due to using the wrong free routine.Eric Anholt2009-07-021-1/+1
| * | intel: Clean up leak of driver context structure on context destroy.Eric Anholt2009-07-021-1/+2
| * | intel: Init num_fences to clean up valgrind warning.Eric Anholt2009-07-021-1/+1
| * | radeon/r200/r300: drop radeon renderbuffer private width/heightDave Airlie2009-07-025-15/+13
| * | radeon/r300: use base width/height.Dave Airlie2009-07-022-12/+13
| * | i965: fixes for JMPIXiang, Haihao2009-07-023-10/+14
| * | intel: Avoid pointer arithmetic on void *.Eric Anholt2009-06-301-1/+1
| * | i965: Increase G4X default VS URB allocation to actually allow 32 threads.Eric Anholt2009-06-301-3/+14
| * | i965: first attempt at handling URB overflow when there's too many vs outputsBrian Paul2009-06-302-4/+49
| * | i965: use BRW_MAX_MRFBrian Paul2009-06-301-1/+1
| * | i965: use BRW_MAX_GRF, BRW_MAX_MRFBrian Paul2009-06-301-2/+3
| * | i965: move BRW_MAX_GRF, define BRW_MAX_MRFBrian Paul2009-06-302-6/+8
| * | i965: defined BRW_MAX_MRFBrian Paul2009-06-301-0/+3
| * | i965: comments and a new assertionBrian Paul2009-06-301-2/+4
| * | i915: Fix assertion failure on remapping a non-BO-backed VBO.Eric Anholt2009-06-301-1/+4
| * | intel: Enable EXT_gpu_program_parameters.Eric Anholt2009-06-291-0/+2
| * | Merge branch 'mesa_7_5_branch'Brian Paul2009-06-291-1/+1
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| | * intel: added null ptr checkBrian Paul2009-06-291-1/+1
| * | Revert "intel: Remove unneded pthread mutex in LOCK_HARDWARE."Eric Anholt2009-06-291-1/+8
| * | intel: Move note_unlock() implementation to the one place it's needed.Eric Anholt2009-06-296-26/+2
| * | intel: Remove unneded pthread mutex in LOCK_HARDWARE.Eric Anholt2009-06-291-6/+0
| * | intel: Make LOCK_HARDWARE recursive to avoid hand-rolling recursiveness.Eric Anholt2009-06-295-47/+19
| * | Revert "r200: make use of DMA buffers for Elts a lot better."Dave Airlie2009-06-293-19/+16
| * | radeon: Always initialize front and back renderbuffers if presentNicolai Hähnle2009-06-271-2/+1
| * | radeon: Update .gitignoreNicolai Hähnle2009-06-272-2/+25
| * | Merge branch 'arb_vertex_array_object'Brian Paul2009-06-262-19/+47
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| | * | intel: enable GL_ARB_vertex_array_object extensionBrian Paul2009-06-221-0/+2
| | * | mesa: regenerated files related to GL_ARB_vertex_array_objectBrian Paul2009-06-191-19/+45
| * | | Merge branch 'mesa_7_5_branch'Brian Paul2009-06-261-0/+11
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| | * | intel / DRI2: Additional flush of fake front-buffer to real front-bufferIan Romanick2009-06-261-0/+11
| * | | i965: fix fetching constants from constant buffer in glsl pathRoland Scheidegger2009-06-264-17/+16
| * | | r200: make use of DMA buffers for Elts a lot better.Dave Airlie2009-06-263-16/+19
| * | | r200: only emit unitneeded texturesDave Airlie2009-06-261-0/+2
| * | | radeon: fix hw texture limitsRoland Scheidegger2009-06-253-9/+14
| * | | radeon/r200: add some hw texture limitsDave Airlie2009-06-252-2/+8
| * | | radeon: fix stupidity in cs space check code.Dave Airlie2009-06-251-2/+6
| * | | intel: fix additional merge conflicts missed in previous commitBrian Paul2009-06-242-18/+0
| * | | Merge branch 'mesa_7_5_branch'Brian Paul2009-06-244-1/+22
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| | * | i965: handle OPCODE_SWZ in the glsl pathRoland Scheidegger2009-06-221-0/+1
| | * | intel: intel_texture_drawpixels() can't handle GL_DEPTH_STENCIL.Michel Dänzer2009-06-221-1/+1
| | * | i965: added intelFlush() call in intel_get_tex_image()Brian Paul2009-06-221-0/+6
| | * | intel: Fix other metaops versus GL_COMPILE_AND_EXECUTE dlists.Eric Anholt2009-06-192-3/+3
| | * | intel: Fix glClear behavior versus display lists.Eric Anholt2009-06-191-1/+1
| | * | radeons: use dp4 for position invariant vertex programsRoland Scheidegger2009-06-193-0/+6
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