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* tnl: Replace deprecated TexCoordPtr with AttribPtr[_TNL_ATTRIB_TEX*]Eric Anholt2009-11-1921-127/+128
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* tnl: Replace NormalPtr with AttribPtr[_TNL_ATTRIB_NORMAL]Eric Anholt2009-11-192-5/+5
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* r600 : update PS and VS emit count for loop constants.Richard Li2009-11-181-2/+2
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* r600 : add some defsRichard Li2009-11-183-3/+55
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* r600 : Initial version of glsl fc.Richard Li2009-11-187-84/+2189
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* Merge branch 'outputswritten64'Ian Romanick2009-11-1718-43/+40
| | | | | | | | | | | | | | | | | | | | | | | | Add a GLbitfield64 type and several macros to operate on 64-bit fields. The OutputsWritten field of gl_program is changed to use that type. This results in a fair amount of fallout in drivers that use programs. No changes are strictly necessary at this point as all bits used are below the 32-bit boundary. Fairly soon several bits will be added for clip distances written by a vertex shader. This will cause several bits used for varyings to be pushed above the 32-bit boundary. This will affect any drivers that support GLSL. At this point, only the i965 driver has been modified to support this eventuality. I did this as a "squash" merge. There were several places through the outputswritten64 branch where things were broken. I foresee this causing difficulties later for bisecting. The history is still available in the branch. Conflicts: src/mesa/drivers/dri/i965/brw_wm.h
* r300: fix reads and writes for MESA_FORMAT_S8Z24 bufferMaciej Cencora2009-11-171-2/+3
| | | | Regression was introduced by texformat-rework branch merge.
* Remove unconditional use of glibc specific bswap_16() macro.Michel Dänzer2009-11-171-2/+4
| | | | Fixes unresolved symbol bswap_16 on non-glibc or little endian glibc platforms.
* dri: Ensure subdirs have finished before linking driverDan Nicholson2009-11-171-1/+5
| | | | | | | | Recursive make is hard. If there are subdirectories in the DRI drivers, it's pretty certain we want to finish building in them before linking the driver. Add a new target to serialize the rules. Signed-off-by: Dan Nicholson <[email protected]>
* r600: More span breakage fixes.Michel Dänzer2009-11-171-0/+12
| | | | | At least now the compiler doesn't complain about implicitly declared functions anymore...
* r600: Attempt to fix span breakage introduced by big endian fixes.Michel Dänzer2009-11-171-0/+8
| | | | | | Only compile tested; I happened to notice people on IRC reporting .../r600_dri.so: undefined symbol: radeon_ptr_2byte_8x2
* radeon: Depth/stencil span code fixes for big endian.Michel Dänzer2009-11-171-24/+24
| | | | Fixes e.g. text in progs/demos/arbocclude.
* radeon: Fix occlusion queries on big endian.Michel Dänzer2009-11-171-7/+9
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* radeon: Fix software fallbacks with KMS on big endian.Michel Dänzer2009-11-172-0/+215
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* radeon: FBO fixes for big endian.Michel Dänzer2009-11-173-11/+44
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* radeon: rn50's have no 3D engine so don't try and init 3D driver.Dave Airlie2009-11-171-2/+4
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* i965: Use MESA_FORMAT_AL1616 when appropriateIan Romanick2009-11-162-3/+12
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* r600: don't force Z orderAlex Deucher2009-11-161-3/+0
| | | | | | | Let the hw decide (early vs late Z) fixes fdo bug 25092 Signed-off-by: Alex Deucher <[email protected]>
* mesa: remove unused vertex array driver hooksBrian Paul2009-11-161-13/+0
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* i965: Share OPCODE_TXB between brw_wm_emit.c and brw_wm_glsl.cEric Anholt2009-11-133-101/+63
| | | | This should fix TXB on G45 and older in the GLSL case.
* i965: Share OPCODE_TEX between brw_wm_emit.c and brw_wm_glsl.c.Eric Anholt2009-11-133-118/+72
| | | | | New comments should explain some of the confusion about how this message works.
* i965: Clean up emit_tex a bit.Eric Anholt2009-11-131-27/+24
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* Merge remote branch 'origin/mesa_7_6_branch'Eric Anholt2009-11-1310-46/+81
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| * i965: Fix Ironlake shadow comparisons.Eric Anholt2009-11-121-7/+17
| | | | | | | | The cube map array index arg is always present.
| * i965: Fix VBO last-valid-offset setup on Ironlake.Eric Anholt2009-11-121-10/+3
| | | | | | | | | | Instead of doing math based on the (broken for VBO && offset != 0) input->count number, just use the BO size. Fixes assertion failure in ETQW.
| * i965: fix EXT_provoking_vertex supportRoland Scheidegger2009-11-118-29/+61
| | | | | | | | | | | | | | | | This didn't work for quad/quadstrips at all, and for all other primitive types it only worked when they were unclipped. Fix up the former in gs stage (could probably do without these changes and instead set QuadsFollowProvokingVertexConvention to false), and the rest in clip stage.
* | i965: Flag BRW_NEW_CONTEXT on some context state.Eric Anholt2009-11-132-6/+6
| | | | | | | | | | | | Fixing this is a prereq for avoiding flagging all state at new batch time. Eliminating that still causes problems, though (notably glean logicOp fails on my GM965).
* | intel: Remove some dead context structure fields.Eric Anholt2009-11-131-2/+0
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* | i965: Remove an unused cache_item field.Eric Anholt2009-11-133-3/+1
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* | i965: Remove long dead structures for ffvertex_prog.c.Eric Anholt2009-11-131-17/+0
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* | i965: Use bo_map instead of subdata to upload the bits of constant buffer.Eric Anholt2009-11-132-2/+26
| | | | | | | | Saves CPU time, resulting in a 2.5% FPS win on ETQW.
* | i965: Validate the number of URB entries selected for the VS.Eric Anholt2009-11-131-4/+33
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* | intel: When subdataing a busy buffer, use a temporary and blit in.Eric Anholt2009-11-131-3/+16
| | | | | | | | | | | | This cuts a massive number of waits in ET:QW, which uses a VBO ringbuffer. Unfortunately it doesn't BufferData when wrapping back to 0, so we can't be clever with tracking what's been initialized.
* | i965: Clean up Ironlake sampler type definitions.Eric Anholt2009-11-133-18/+10
| | | | | | | | They're the same regardless of execution width for 8, 4x2, and 16.
* | i965: Avoid moving the current value back into the accumulator for MAD.Eric Anholt2009-11-131-1/+34
| | | | | | | | | | This is a 2.9% (+/-.3%) performance win for my GL demo, which hits MAD sequences for matrix transforms.
* | intel: Don't check for context pointer to be NULL during extension initIan Romanick2009-11-121-7/+6
| | | | | | | | | | | | | | | | | | | | Thanks to Chia-I Wu's changes to the extension function infrastructure, we no longer have to tell the loader which extensions the driver might enable. This means that intelInitExtensions will never be called with a NULL context pointer. Remove all the NULL checks. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* | intel: Remove unused enable_imaging parameter to intelInitExtensionsIan Romanick2009-11-123-6/+4
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* | r300, r300g: Add missing registers.Corbin Simpson2009-11-111-0/+2
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* | Merge remote branch 'origin/mesa_7_6_branch'Eric Anholt2009-11-101-1/+11
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| * i965: Fix VS constant buffer value loading.Eric Anholt2009-11-101-1/+11
| | | | | | | | | | | | | | | | | | | | Previously, we'd load linearly from ParameterValues[0] for the constants, though ParameterValues[1] may not equal ParameterValues[0] + 4. Additionally, the STATE_VAL type paramters didn't get updated. Fixes piglit vp-constant-array-huge.vpfp and ET:QW object locations. Bug #23226.
| * i965: Unalias src/dst registers for SGE and friends.Eric Anholt2009-11-101-19/+21
| | | | | | | | | | | | | | Fixes piglit vp-sge-alias test, and the googleearth ground shader. \o/ Bug #22228 (cherry picked from commit 56ab92bad8f1d05bc22b8a8471d5aeb663f220de)
| * i965: Allow use of PROGRAM_LOCAL constants in ARB_vp.Eric Anholt2009-11-101-1/+1
| | | | | | | | | | Fixes piglit arl.vp. (cherry picked from commit d52d78b4bcd6d4c0578f972c0b8ebac09e632196)
| * r600: don't emit htile regsAlex Deucher2009-11-091-4/+2
| | | | | | | | | | | | These are needed for HiZ which is not currently used and the _BASE reg requires a reloc which is not currently supported in the drm.
* | i965: avoid memsetting all the BRW_WM_MAX_INSN arrays for every compile.Eric Anholt2009-11-104-4/+23
| | | | | | | | | | | | | | | | | | For an app that's blowing out the state cache, like sauerbraten, the memset of the giant arrays ended up taking 11% of the CPU even when only a "few" of the entries got used. With this, the WM program compile drops back down to 1% of CPU time. Bug #24981 (bisected to BRW_WM_MAX_INSN increase).
* | i965: Add a note explaining the data cache domain.Eric Anholt2009-11-101-1/+4
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* | i965: Unalias src/dst registers for SGE and friends.Eric Anholt2009-11-101-19/+21
| | | | | | | | | | | | Fixes piglit vp-sge-alias test, and the googleearth ground shader. \o/ Bug #22228
* | i965: Allow use of PROGRAM_LOCAL constants in ARB_vp.Eric Anholt2009-11-101-1/+1
| | | | | | | | Fixes piglit arl.vp.
* | r600/r700: typo, fix mask of DB_ALPHA_TO_MASKJerome Glisse2009-11-091-3/+3
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* | r600: rework DB render setupAlex Deucher2009-11-094-42/+73
| | | | | | | | | | | | | | - consolidate DB render setup - only enable perfect ZPASS counts and cull disable when OQ is active - enable early Z
* | r600: don't emit htile regsAlex Deucher2009-11-091-4/+2
| | | | | | | | | | | | These are needed for HiZ which is not currently used and the _BASE reg requires a reloc which is not currently supported in the drm.
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