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* i965/miptree: Return NONE from texture_aux_usage when fully resolvedJason Ekstrand2017-08-181-1/+14
| | | | | | | | | | | This little optimization improves the performance of SynMark v7 TexFilterTri by almost 10% on Sky Lake GT4 among other improvements. We've been doing it for some time but somehow it got dropped during the miptree refactoring. Reviewed-by: Kenneth Graunke <[email protected]> Bugzilla: https://bugs.freedesktop.org/102258 Cc: "17.2" <[email protected]>
* i965: Stop looking at NewDriverState when emitting 3DSTATE_URBJason Ekstrand2017-08-183-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | Looking at NewDriverState is not safe in general. The state atom system is set up to ensure that new bits that get added to NewDriverState get accumulated into the set of bits used when emitting atoms but it doesn't go the other way. If we read NewDriverState, we may not get the full picture because the per-pipeline state (3D or compute) does not get added to NewDriverState before state emit is done. It's especially dangerous to do this from BLORP (either explicitly or implicitly when BLORP calls gen7_upload_urb) because that does not happen during one of the normal state upload paths. This commit solves the problem by whacking all of the per-shader-stage URB sizes to zero whenever we change the total URB size. We still have to flag BRW_NEW_URB_SIZE to ensure that the gen7_urb atom triggers but the actual decision in gen7_upload_urb can now be based entirely on URB sizes rather than on state atoms. This also makes BLORP correct because it just asks for a new URB config whenever the vsize is too small and so any change to the total URB size will trigger blorp to re-emit as well because 0 < vs_entry_size. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Bugzilla: https://bugs.freedesktop.org/102289 Cc: [email protected]
* i965: Mark all EGLimages as non-coherent.Kenneth Graunke2017-08-181-5/+3
| | | | | | | | | | | | | | | | EGLimages are shared with external users, and we don't know what they're going to do with them. They might scan them out. They might access them in a way that doesn't work with our explicit clflushing. It's safest to simply mark them non-coherent. Chris Wilson caught this problem and wrote a similar (though less aggressive) patch to solve it; the miptree code has since undergone a lot of refactoring so I had to rewrite it. Cc: "17.2" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Chris Wilson <[email protected]>
* i965: Fix missing newlines in perf_debug messages.Kenneth Graunke2017-08-172-3/+3
| | | | perf_debug() doesn't append a newline for you.
* i965: Alphabetize TCS image dirty bitsKenneth Graunke2017-08-161-1/+1
| | | | Trivial.
* i965: Always allow CPU readback of the scanout on LLC platformsChris Wilson2017-08-161-1/+15
| | | | | | | | | LLC platforms are magic in that reads from the CPU are always cache coherent, or rather GPU writes that bypass LLC do still invalidate the appropriate cache line. Cc: "17.2" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: make sure check_and_emit_atom gets inlinedTapani Pälli2017-08-161-1/+1
| | | | | | | | | | | | | | Improves performance of 3DMark "Ice Storm Unlimited" benchmark by 1-2% on Apollolake (on Android-IA using clang 3.8.256229). Change is based on the performance profiling work and results by Aravindan Muthukumar and Yogesh Marathe. Signed-off-by: Tapani Pälli <[email protected]> Signed-off-by: Aravindan Muthukumar <[email protected]> Signed-off-by: Yogesh Marathe <[email protected]> Reviewed-by: Scott D Phillips <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Advertise the CCS modifierBen Widawsky2017-08-141-4/+40
| | | | | | | | | | | | | | | | | | | | | | | | v2: Rename modifier to be more smart (Jason) FINISHME: Use the kernel's final choice for the fb modifier bwidawsk@norris2:~/intel-gfx/kmscube (modifiers $) ~/scripts/measure_bandwidth.sh ./kmscube none Read bandwidth: 603.91 MiB/s Write bandwidth: 615.28 MiB/s bwidawsk@norris2:~/intel-gfx/kmscube (modifiers $) ~/scripts/measure_bandwidth.sh ./kmscube ytile Read bandwidth: 571.13 MiB/s Write bandwidth: 555.51 MiB/s bwidawsk@norris2:~/intel-gfx/kmscube (modifiers $) ~/scripts/measure_bandwidth.sh ./kmscube ccs Read bandwidth: 259.34 MiB/s Write bandwidth: 337.83 MiB/s v2: Move all references to the new fourcc code(s) to this patch. v3: Rebase, remove Yf_CCS (Daniel) Signed-off-by: Ben Widawsky <[email protected]> Signed-off-by: Jason Ekstrand <[email protected]> Acked-by: Daniel Stone <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: More conservatively resolve external imagesJason Ekstrand2017-08-143-1/+47
| | | | | | | | | Instead of always doing a full resolve, only resolve the bits that are needed. This means that we only do a partial resolve when the miptree modifier is I915_FORMAT_MOD_Y_TILED_CCS. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Pretend that CCS modified images are two planesBen Widawsky2017-08-141-21/+34
| | | | | | | | | | | | | | | | v2: move is_aux into if block. (Jason) Use else block instead of goto (Jason) v3: Fix up logic for is_aux (Ben) Fix up size calculations and add FIXME (Ben) v4 (Jason Ekstrand): Use the aux_pitch in the image instead of calculating it Signed-off-by: Ben Widawsky <[email protected]> Acked-by: Daniel Stone <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/screen: Support import and export of surfaces with CCSJason Ekstrand2017-08-141-8/+71
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Allocate mcs_buf for an image's CCSBen Widawsky2017-08-141-4/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This code will disable actually creating these buffers for the scanout, but it puts the allocation in place. Primarily this patch is split out for review, it can be squashed in later if preferred. v2: assert(mt->offset == 0) in ccs creation (as requested by Topi) Remove bogus is_scanout check in miptree_release v3: Remove is_scanout assert in intel_miptree_create. It doesn't work with latest codebase - not sure it ever should have worked. v4: assert(mt->last_level == 0) and assert(mt->first_level == 0) in ccs setup (Topi) v5 (Jason Ekstrand): - Base the decision to allocate a CCS on the image modifier Signed-off-by: Ben Widawsky <[email protected]> Acked-by: Daniel Stone <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Support images with aux buffersBen Widawsky2017-08-141-0/+6
| | | | | | | | | | | | | | Previously images did not support any auxiliary compression surfaces (CCS, MCS, or HiZ). That's about to change. This patch just adds the fields to __DRIimageRec to make auxiliary surfaces possible. v2 (Jason Ekstrand): - Add an aux_pitch parameter as well as aux_offset Signed-off-by: Ben Widawsky <[email protected]> Acked-by: Daniel Stone <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/screen: Stop redefining DRM_FORMAT_MOD_(INVALID|LINEAR)Jason Ekstrand2017-08-141-8/+0
| | | | Reviewed-by: Ben Widawsky <[email protected]>
* i965/blorp: Correct type of src_format in call to ↵Scott D Phillips2017-08-141-1/+2
| | | | | | | | | | | | | | | | | | intel_miptree_texture_aux_usage intel_miptree_texture_aux_usage() takes an isl_format, but we are passing a mesa_format. clang warns: brw_blorp.c:305:52: warning: implicit conversion from enumeration type 'mesa_format' to different enumeration type 'enum isl_format' [-Wenum-conversion] intel_miptree_texture_aux_usage(brw, src_mt, src_format); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^~~~~~~~~~ Fixes: fc1639e46d ("i965/blorp: Use texture/render_aux_usage for blits") Cc: "17.2" <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Guard GetBufferSubData's streaming memcpy load with USE_SSE41Kenneth Graunke2017-08-121-0/+2
| | | | | | | | | | This should hopefully fix build issues on 32-bit Android-x86. v2: s/USE_SSE4_1/USE_SS41/, caught by Gražvydas Ignotas. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102050 Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965: Clean up intel_batchbuffer_init().Kenneth Graunke2017-08-123-12/+11
| | | | | | | | | | | | | Passing screen lets us get the kernel features, devinfo, and bufmgr, without needing container_of. This use of container_of could cause crashes due to issues with the "sample" macro parameter. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102062 Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* dri: Introduce SWAP_METHOD tokensThomas Hellstrom2017-08-106-10/+8
| | | | | | | | | | | | We shouldn't be using GLX tokens in the dri subsystem, so define dri SWAP_METHOD tokens and translate when necessary. Unfortunately the X server uses the dri swap method value untranslated as the GLX fbconfig swapMethod, so we can't enumerate these tokens arbitrarily, but rather need to make them have the same values as the corresponding GLX tokens. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* dri: Fix __DRIconfig reporting of __DRI_ATTRIB_SWAP_METHODThomas Hellstrom2017-08-102-6/+2
| | | | | | | | | | | | | | The attribMap had two entries for this attribute, and driGetConfigAttribIndex didn't return a proper value for this attribute. Fix this, and also make sure we return SWAP_UNDEFINED for single-buffer configs as required by the GLX_OML_swap_method spec. Finally bump the dri core extension version to 2, indicating that we correctly report __DRI_ATTRIB_SWAP_METHOD. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* i965/bufmgr: Set bo->idle after waiting.Kenneth Graunke2017-08-081-0/+2
| | | | | | | | | | After a successful wait, we know the buffer ought to be idle. Chris points out that: "The only caveat here is that bo is global, and we have a very unlikely (and probably unnoticeable) race condition with multiple contexts." Reviewed-by: Chris Wilson <[email protected]>
* i965: Don't use ggtt_bo for Gen8+ streamout offset buffer.Kenneth Graunke2017-08-081-1/+1
| | | | | | | RELOC_NEEDS_GGTT is only meaningful on Sandybridge - it's skipped on other generations - so this has no purpose. Just use rw_bo(). Reviewed-by: Chris Wilson <[email protected]>
* i965: Simplify *_bo() helpers.Kenneth Graunke2017-08-081-47/+25
| | | | | | | | With the reloc domains gone, most of these are basically the same, and the names don't make much sense anymore. Simplify them to ro_bo(), rw_bo(), and ggtt_bo(). Reviewed-by: Chris Wilson <[email protected]>
* i965: Get rid of KSP_roKenneth Graunke2017-08-081-15/+4
| | | | | | | | | The GPU reads the shader kernel from the program cache BO. It never writes it, so using a read-write BO reference makes no sense. Just make KSP read-only, and drop KSP_ro. Reviewed-by: Chris Wilson <[email protected]>
* i965: Only call create_for_planar_image for multiple planesJason Ekstrand2017-08-081-1/+4
| | | | | | | | | Before, we ended up always calling miptree_create_for_planar_image in almost all cases because most images have image->planar_format != NULL. This commit makes us only take that path if we have a multi-planar format. Reviewed-by: Daniel Stone <[email protected]>
* i965/miptree: Set supports_fast_clear = false in make_shareableJason Ekstrand2017-08-071-0/+1
| | | | | | | | | | | | The make_shareable function deletes the aux buffer and then whacks aux_usage to ISL_AUX_USAGE_NONE but not unsetting supports_fast_clear. Since we only look at supports_fast_clear to decide whether or not to do fast clears, this was causing assertion failures. Reported-by: Tapani Pälli <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101925 Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* i965/miptree: Rework create flagsJason Ekstrand2017-08-078-38/+52
| | | | | | | | | The only one of the three remaining flags that has anything whatsoever to do with layout is TILING_NONE. This commit renames them to MIPTREE_CREATE_*, documents the meaning of each flag, and makes the create functions take an actual enum type so GDB will print them nicely. Reviewed-by: Jordan Justen <[email protected]>
* i965/miptree: Delete MIPTREE_LAYOUT_TILING_(Y|ANY)Jason Ekstrand2017-08-076-24/+8
| | | | | | | The only force tiling flag we really care about is LAYOUT_TILING_NONE. The others don't actually do anything but add confusion. Reviewed-by: Jordan Justen <[email protected]>
* i965/miptree: Delete an unused function declarationJason Ekstrand2017-08-071-5/+0
| | | | | | The implementation of brw_miptree_layout was removed in bf24c3539e4b69. Reviewed-by: Jordan Justen <[email protected]>
* i965/miptree: Call alloc_aux in create_for_boJason Ekstrand2017-08-071-6/+7
| | | | | | | | | | | | Originally, I had moved it to the caller to make some things easier when adding the CCS modifier. However, this broke DRI2 because intel_process_dri2_buffer calls intel_miptree_create_for_bo but never calls intel_miptree_alloc_aux. Also, in hindsight, it should be pretty easy to make the CCS modifier stuff work even if create_for_bo allocates the CCS when DISABLE_AUX is not set. Reviewed-by: Jordan Justen <[email protected]> Cc: "17.2" <[email protected]>
* i965/miptree: Delete MIPTREE_LAYOUT_FOR_SCANOUTJason Ekstrand2017-08-073-7/+15
| | | | | | | | | The flag hasn't affected actual surface layout for some time. The only purpose it served was to set bo->cache_coherent = false on the BO used to create the miptree. This is fairly silly because we can just set that directly from the caller where it makes much more sense. Reviewed-by: Jordan Justen <[email protected]>
* i965/miptree: Delete some unused layout flagsJason Ekstrand2017-08-072-10/+2
| | | | Reviewed-by: Jordan Justen <[email protected]>
* i965/miptree: Refactor is_mcs_supportedJason Ekstrand2017-08-071-4/+9
| | | | | | | | | We rename it to intel_miptree_supports_mcs and make the function signature match intel_miptree_supports_ccs/hiz. We also move the sample count check into the function so it returns false for single-sampled surfaces. Reviewed-by: Jordan Justen <[email protected]>
* i965/miptree Remove layout_flags parameter form is_mcs_supportedJason Ekstrand2017-08-071-9/+2
| | | | | | | The one caller of is_mcs_supported passes 0 in as the layout_flags unconditionally. Reviewed-by: Jordan Justen <[email protected]>
* mesa: add support for memory object creation/import/deleteAndres Rodriguez2017-08-061-0/+4
| | | | | | | | | | | | | | | | | | | | | | Used by EXT_external_objects and EXT_external_objects_fd V2 (Timothy Arceri): - Throw GL_OUT_OF_MEMORY error if CreateMemoryObjectsEXT() fails. - C99 tidy ups - remove void cast (Constantine Kharlamov) V3 (Timothy Arceri): - rename mo -> memObj - check that the object is not NULL before initializing - add missing "EXT" in function error message V4 (Timothy Arceri): - remove checks for (memory objecy id == 0) and catch in _mesa_lookup_memory_object() instead. Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* i965: Reduce passing 2x32b of reloc_domains to 2 bitsChris Wilson2017-08-0423-291/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel only cares about whether the object is to be written to or not, only reduces (reloc.read_domains, reloc.write_domain) down to just !!reloc.write_domain. When we use NO_RELOC, the kernel doesn't even read those relocs and instead userspace has to pass that information in the execobject.flags. We can simplify our reloc api by also removing the unused read/write domains and only pass the resultant flags. The caveat to the above are when we need to make the kernel aware that certain objects need to take into account different work arounds. Previously, this was done using the magic (INSTRUCTION, INSTRUCTION) reloc domains. NO_RELOC requires this to be passed in the execobject flags as well, and now we push that up the callstack. The API is more compact, more expressive of what happens underneath, but unfortunately requires more knowledge of the system at the point of use. Conversely it also means that knowledge is specific and not generally applied and so not overused. text data bss dec hex filename 8502991 356912 424944 9284847 8dacef lib/i965_dri.so (before) 8500455 356912 424944 9282311 8da307 lib/i965_dri.so (after) v2: (by Ken) Rebase. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Convert reloc.target_handle into an index for I915_EXEC_HANDLE_LUTKenneth Graunke2017-08-041-2/+2
| | | | | | | | | | | | | | | | | | | Based on a patch by Chris Wilson (who also wrote this commit message). Passing the index of the target buffer via the reloc.target_handle is marginally more efficient for the kernel (it can avoid some allocations, and can use a direct lookup rather than a hash or search). It is also useful for ourselves as we can use the index into our exec_bos for other tasks. v2: Only enable HANDLE_LUT if we can use BATCH_FIRST and thereby avoid a post-processing loop to fixup the relocations. v3: Move kernel probing from context creation to screen init. Use batch->use_exec_lut as it more descriptive of what's going on (Daniel) v4: Kernel features already exists, use it for BATCH_FIRST Rename locals to preserve current flavouring v5: Squash in "always insert batch bo first" v6: (by Ken) Split out BATCH_FIRST from HANDLE_LUT.
* i965: Use a C99 initializer for new validation list entries.Kenneth Graunke2017-08-041-10/+7
| | | | | | More succinct - we can skip a bunch of = 0 lines. Extracted from a patch by Chris Wilson.
* i965: Simplify some bo != batch->bo special cases.Kenneth Graunke2017-08-041-27/+19
| | | | | | | | Extracted from a patch by Chris Wilson. Now that the batch is always at the front of the validation list, we don't need to special case it - the usual "go find an existing BO" code will work just fine.
* i965: Use I915_EXEC_BATCH_FIRST when available.Kenneth Graunke2017-08-044-10/+33
| | | | | | This will make it easier to use I915_EXEC_HANDLE_LUT. Based on a patch by Chris Wilson.
* i965: Move add_exec_bo()Chris Wilson2017-08-041-53/+53
| | | | | | | | | | To avoid a forward declaration in the next patch, move the definition of add_exec_bo() earlier. v2: (by Ken) redo move. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Ignore reloc read/write domainsChris Wilson2017-08-041-11/+7
| | | | | | | | | | | | | | | | | | | | | | | | Since before the kernel supported I915_EXEC_NO_RELOC, long before our minimum kernel requirement, the kernel unconditionally invalidated all GPU TLBs before a batch and flushed all GPU caches after a batch. At that moment, the only use for read/write domain was for activity tracking, ensuring that future reads waited for the last writer and future writes waited for all reads. This only requires a single bit in the execbuf interface which can be supplied via the NO_RELOC interface, making the use of relocation domains entirely redundant. Trimming the excess writes into the array allows the compiler to be much more frugal: text data bss dec hex filename 8493790 357184 424944 9275918 8d8a0e i965_dri.baseline 8493758 357184 424944 9275886 8d89ee i965_dri.so (This text improvement really does come from dropping domains, not from the new use of C99 initializers.) Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Use I915_EXEC_NO_RELOCChris Wilson2017-08-041-7/+33
| | | | | | | | | | | | If we correctly fill the batch with the right relocation value, and that matches the expected location of the object, we can then tell the kernel it can forgo checking each individual relocation by only checking whether the object moved. v2: Rebase to apply ahead of I915_EXEC_HANDLE_LUT Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Initialize flags to 0 and |= in new flags.Kenneth Graunke2017-08-041-3/+3
| | | | This makes it a bit easier to add new unconditional flags.
* i965: Make add_exec_bo return the validation list index.Kenneth Graunke2017-08-041-4/+5
| | | | This will be useful for I915_EXEC_HANDLE_LUT and I915_EXEC_NO_RELOC.
* i965: Track last location of bo used for the batchChris Wilson2017-08-043-2/+27
| | | | | | | | | | | | | | Borrow a trick from anv, and use the last known index for the bo to skip a search of the batch->exec_bo when adding a new relocation. In defence against the bo being used in multiple batches simultaneously, we check that this slot exists and points back to us. v2: Also update brw_batch_references() v3: Reset bo->index on creation (Daniel) v4: Improved explanation of bo->index (Kenneth) Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Always use the pre-computed offset for the relocation entryChris Wilson2017-08-042-42/+36
| | | | | | | | | | | | | | | | We must be careful to only compute the address once based on the per-context information (rather than accessing the unlocked global bo->offset64) so that the value in the batch does match the reloc.presumed_offset we declare to the kernel. Otherwise, highly unlikely, but we may see GPU hangs in multithreaded users. The only real complication here is isl_surf_fill_state() which needs to adjust the reloc.delta to both general a tile offset and to encode state into the lower 12 bits. (Rebased on ISL changes by Ken.) Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Make brw_emit_reloc assert that the target BO is non-NULL.Kenneth Graunke2017-08-041-0/+2
| | | | | | You need an actual BO to emit a relocation to it. Suggested by me, authored by Chris, split out of a larger patch.
* i965: Prefer using streaming reads from WC mmapsChris Wilson2017-08-041-3/+15
| | | | | | | | | | For buffer objects, where we primarily expect to be writing to them and so already have a WC mmap (for !llc access) reusing the existing mmap and keeping the buffer out of the CPU cache seems preferable. Cc: Kenneth Graunke <[email protected]> Cc: Matt Turner <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Drop unnecessary I915_PARAM_HAS_EXEC_CAPTURE definesKenneth Graunke2017-08-031-3/+0
| | | | | | | | These were only here to keep building without needing to update libdrm. Now that we include i915_drm.h in Mesa, we don't need this - our copy is new enough and has the #define. Trivial.
* i965/blit: Remember to include miptree buffer offset in relocsChris Wilson2017-08-022-3/+3
| | | | | | | | Remember to add the offset to the start of the buffer in the relocation or else we write 0xff into random bytes elsewhere. Reviewed-by: Kenneth Graunke <[email protected]> Cc: [email protected]