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* vbo: add a prefix to count_tessellated_primitivesDave Airlie2012-09-151-1/+1
| | | | | | | | | Just to make it consistent with the rest of vbo, since it would be an exported symbol anyways. Reviewed-by: Matt Turner <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* meta: make mem_ctx non-global.Dave Airlie2012-09-152-3/+1
| | | | | | | I can't see any external users, and this is a global symbol, Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* meta: Refactor handling of GL_MULTISAMPLE.Paul Berry2012-09-141-31/+2
| | | | | | | | | | | | | | | | | In commit 055093e (meta: remove call to _meta_in_progress(), fix multisample enable/disable), we created a meta_set_enable() function that could be used by meta ops to enable and disable GL_MULTISAMPLE even when the GLES API was in use (the GLES API doesn't support GL_MULTISAMPLE; it behaves as if it is always enabled). This created some unfortunate code duplication between meta_set_enable() and the existing _mesa_set_enable() function. This patch eliminates the duplication by creating a _mesa_set_multisample() function, which is used by both meta ops and _mesa_set_enable() to enable/disable GL_MULTISAMPLE. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* _mesa_meta_GenerateMipmap: Generate separate shaders for glsl 120 / 130Anuj Phogat2012-09-141-20/+58
| | | | | | | | | | | | | glsl version of _mesa_meta_GenerateMipmap() would require separate shaders for glsl 120 and 130. V2: Removed the code for integer textures as ARB is planning to disallow automatic mipmap generation for integer textures. NOTE: This is a candidate for stable branches. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* _mesa_meta_GenerateMipmap: Support all texture targets by generating shaders ↵Anuj Phogat2012-09-142-6/+74
| | | | | | | | | | | | | | | | | | at runtime glsl path of _mesa_meta_GenerateMipmap() function would require different fragment shaders depending on the texture target. This patch adds the code to generate appropriate fragment shader programs at run time. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=54296 V2: Removed the code for integer textures as ARB is planning to disallow automatic mipmap generation for integer textures. Now using ralloc_asprintf in setup_glsl_generate_mipmap(). NOTE: This is a candidate for stable branches. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965: Fix out-of-order sampler unit usage in ARB fragment programs.Kenneth Graunke2012-09-122-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | ARB fragment programs use texture unit numbers directly, unlike GLSL which has an extra indirection. If a fragment program only uses one texture assigned to GL_TEXTURE1, SamplersUsed will only contain a single bit, which would make us only upload a single surface/sampler state entry. However, it needs to be the second entry. Using _mesa_fls() instead of _mesa_bitcount() solves this. For ARB programs, this makes num_samplers the ID of the highest texture unit used. Since GLSL uses consecutive integers assigned by the linker, _mesa_fls() should give the same result as _mesa_bitcount().. Fixes a regression since 85e8e9e000732908b259a7e2cbc1724a1be2d447, which caused GPU hangs in ETQW (and probably others), as well as breaking piglit test fp-fragment-position. v2: Add a comment, as suggested by Matt. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54098 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54179 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Tested-by: meng <[email protected]>
* i965/blorp: Fix offsets and width/height for stencil blits.Paul Berry2012-09-121-9/+37
| | | | | | | | Fixes piglit test "framebuffer-blit-levels draw stencil". NOTE: This is a candidate for stable release branches. Acked-by: Eric Anholt <[email protected]>
* i965/blorp: Reduce alignment restrictions for stencil blits.Paul Berry2012-09-121-6/+17
| | | | | | | | | | | | | | | | | | | | | | | | | Previously, we aligned all stencil blit operations to multiples of the size of a tile, since stencil buffers use W-tiling, and blorp has to approximate this by configuring the 3D pipeline for Y-tiling and swizzling coordinates. However, this was unnecessarily conservative; it turns out that the differences between W-tiling and Y-tiling are confined to 32-byte sub-tiles within the 4k tiling pattern; the layout of these 32-byte sub-tiles within the larger 4k tile is the same (8 sub-tiles across by 16 sub-tiles down, in column-major order). Therefore we only need to align stencil blit operations to multiples of the sub-tile size. Note: although the performance improvement of this change is probably quite small, the fact that W-tiling and Y-tiling formats only differ within 32-byte sub-tiles will be essential in a future patch to ensure that stencil blits work correctly between parts of the miptree other than level/layer 0. Making this change provides handy documentation (and validation) of this fact. NOTE: This is a candidate for stable release branches. Acked-by: Eric Anholt <[email protected]>
* i965/blorp: don't reduce stencil alignment restrictions when multisampling.Paul Berry2012-09-121-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | When blitting to a stencil buffer, we need to align the rectangle we send down the rendering pipeline, to account for the fact that the stencil buffer uses a W-tiled layout, but we are configuring its surface state as Y-tiled. Previously, when the stencil buffer was multisampled, we assumed that we could reduce the amount of alignment that was necessary, since each pixel occupies a block of 2x2 or 4x2 samples in the stencil buffer. That would have been correct if the coordinates we were adjusting were measured in pixels. However, the conversion from pixel coordinates to coordinates within the interleaved buffer has already been done; therefore the full alignment restriction applies. Note: the reason this mistake wasn't previously uncovered by piglit tests is because it is being masked by another mistake: the blorp engine is using overly conservative alignment restrictions when doing stencil blits. The overly conservative alignment restrictions will be removed in the patch that follows. Doing this fix now will prevent the subsequent patch from introducing regressions. NOTE: This is a candidate for stable release branches. Acked-by: Eric Anholt <[email protected]>
* intel: Add map_stencil_as_y_tiled to intel_region_get_aligned_offset.Paul Berry2012-09-128-13/+31
| | | | | | | | | | This patch modifies intel_region_get_aligned_offset() to make the appropriate calculation when the blorp engine sets up a W-tiled stencil buffer using a Y-tiled SURFACE_STATE. NOTE: This is a candidate for stable release branches. Acked-by: Eric Anholt <[email protected]>
* intel: Add map_stencil_as_y_tiled to intel_region_get_tile_masks.Paul Berry2012-09-128-13/+21
| | | | | | | | | | | When the blorp engine is performing a blit from one stencil buffer to another, it sets up the surface state for these buffers as Y-tiled, so it needs to be able to force intel_region_get_tile_masks() to return the appropriate masks for a Y-tiled region. NOTE: This is a candidate for stable release branches. Acked-by: Eric Anholt <[email protected]>
* i965/blorp: Account for offsets when emitting SURFACE_STATE.Paul Berry2012-09-124-4/+48
| | | | | | | | Fixes piglit tests "framebuffer-blit-levels {read,draw} depth". NOTE: This is a candidate for stable release branches. Reviewed-by: Eric Anholt <[email protected]>
* i965/blorp: Thread level and layer through brw_blorp_blit_miptrees().Paul Berry2012-09-123-6/+19
| | | | | | | | | | | | | | | | | | Previously, when performing a blit using the blorp engine, we failed to account for the level and layer of the source and destination. As a result, all blits would occur between miplevel 0 and layer 0 of the corresponding textures, regardless of which level/layer was bound to the framebuffer. This patch passes the correct level and layer through brw_blorp_miptrees() into the brw_blorp_blit_params data structure. Further patches in the series will adapt gen{6,7}_blorp_emit_surface_state to make use of these parameters. NOTE: This is a candidate for stable release branches. Reviewed-by: Eric Anholt <[email protected]>
* i965/blorp: Don't create a dummy renderbuffer just to fetch image offsets.Paul Berry2012-09-121-8/+1
| | | | | This is unnecessary--the image offsets can be read directly out of the miptree using intel_miptree_get_image_offset.
* i965/blorp: store x and y offsets in brw_blorp_mip_info.Paul Berry2012-09-124-28/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, gen{6,7}_blorp_emit_surface_state assumes that the src and dst surfaces are mapped to miplevel 0 and layer 0 (thus no surface offset is required). This is a bug, since the user might try to blit to and from levels/layers other than 0. To fix this bug, it will not be sufficient to have gen6_{6,7}_blorp_emit_surface_state look up the surface offset at the time they set up the surface state, since these offsets will need to be tweaked when blitting stencil buffers (due to the fact that stencil buffer blits have to swizzle between W and Y tiling formats). So, to pave the way for the bug fix, this patch causes the x and y offsets to be computed during blit setup and stored in brw_blorp_mip_info. As a result of this change, brw_blorp_mip_info doesn't need to store the level and layer anymore. For consistency, this patch makes a similar change to the handling of depth buffers when doing HiZ operations. NOTE: This is a candidate for stable release branches. Reviewed-by: Eric Anholt <[email protected]>
* i965/blorp: store surface width/height in brw_blorp_mip_info.Paul Berry2012-09-125-37/+48
| | | | | | | | | | | | | | | | | | | | Previously, gen{6,7}_blorp_emit_surface_state would look up the width and height of the surface at the time they set up the surface state, and then tweak it if necessary (it's necessary when a W-tiled surface is being mapped as Y-tiled). With this patch, we look up the width and height when setting up the blit, and store them in brw_blorp_mip_info. This allows us to do the necessary tweak in the brw_blorp_blit_params constructor (where it makes more sense). It also reduces the need to keep track of level and layer in brw_blorp_mip_info, so that a future patch can eliminate them entirely. For consistency, this patch makes a similar change to the handling of depth buffers when doing HiZ operations. NOTE: This is a candidate for stable release branches. Reviewed-by: Eric Anholt <[email protected]>
* i965/blorp: Change gl_renderbuffer* params to intel_renderbuffer*.Paul Berry2012-09-121-28/+32
| | | | | | | | | This makes it more convenient for blorp functions to get access to Intel-specific data inside the renderbuffer objects. NOTE: This is a candidate for stable release branches. Reviewed-by: Eric Anholt <[email protected]>
* i965/blorp: Clarify why width/height must be adjusted for Gen6 IMS surfaces.Paul Berry2012-09-122-1/+10
| | | | | | | | | Also add a clarifying comment for why the width/height doesn't need adjustment for Gen7. NOTE: This is a candidate for stable release branches. Reviewed-by: Eric Anholt <[email protected]>
* i965/gen6+: Adjust stencil buffer size after computing miptree layout.Paul Berry2012-09-121-12/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since Gen6+ stencil buffers use W-tiling (a tiling arrangement which drm and the kernel are not aware of) we need to round up the width and height of a stencil buffer to multiples of the W-tile size (64x64) before allocating a stencil buffer. Previously, we rounded up the size of the base miplevel, and then computed the miptree layout based on the rounded up size. This was incorrect, because it meant that the total size of the miptree would not be properly W-tile aligned, and therefore we would not always allocate enough pages. (Note: even though the GL API doesn't allow creation of mipmapped stencil textures, it does allow mipmapping of a combined depth/stencil texture, and on Gen6+, a combined depth/stencil texture is internally implemented as a pair of separate depth and stencil buffers.) For example, on Sandy Bridge, when allocating a mipmapped stencil texture of size 128x128, we would first round up to the nearest multiple of 64x64 (causing no change to the size), and then compute the miptree layout (whose size worked out to 128x196). Then we would request an allocation of 128*196 bytes (6.125 pages), causing 7 pages to be allocated to the texture. However, the texture needs 8 pages, since each W-tile occupies a page, and it takes 2 W-tiles to cover a width of 128 and 4 W-tiles to cover a height of 196. This patch changes the order of operations so that the miptree layout is computed first and then the total size of the miptree is rounded up to be W-tile aligned. NOTE: This is a candidate for stable release branches. Reviewed-by: Eric Anholt <[email protected]>
* i965: Remove incorrect comment above opt_algebraic.Kenneth Graunke2012-09-101-8/+0
| | | | | The comment was cut-and-pasted from propagate_constants(), and had no relation at all to opt_algebraic().
* Set OSMESA_VERSION=8.Johannes Obermayr2012-09-072-3/+3
| | | | | | VERSION_NUMBER is not required anymore. So it will be removed. Reviewed-by: Adam Jackson <[email protected]>
* i965: Fix virtual_grf_interferes() between calculate_live_intervals() and DCE.Eric Anholt2012-09-071-0/+24
| | | | | | | This fixes the blue zombies bug in l4d2. NOTE: This is a candidate for the 9.0 branch. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Make the param pointer arrays for the VS dynamically sized.Eric Anholt2012-09-074-2/+38
| | | | | | | | | Saves 96MB of wasted memory in the l4d2 demo. v2: Rebase on compare func change, change brace style. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Make the param pointer arrays for the WM dynamically sized.Eric Anholt2012-09-075-4/+46
| | | | | | | | | Saves 26.5MB of wasted memory allocation in the l4d2 demo. v2: Rebase on compare func change, fix comments. Reviewed-by: Ian Romanick <[email protected]> (v1) Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add functions for comparing two brw_wm/vs_prog_data structs.Eric Anholt2012-09-076-6/+78
| | | | | | | | | | | | Currently, this just avoids comparing all unused parts of param[] and pull_param[], but it's a step toward getting rid of those giant statically sized arrays. v2: Actually use the new function instead of just looking at its address. This required changing the args to const pointers. (review by Kenneth) Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix primitive restart on Haswell.Kenneth Graunke2012-09-065-1/+43
| | | | | | | | | | | | | | | | | | | | | Haswell moved the "Cut Index Enable" bit from the INDEX_BUFFER packet to a new 3DSTATE_VF packet, so we need to emit that. Also, it requires us to specify the cut index rather than assuming it's 0xffffffff. This adds a new Haswell-specific tracked state atom to gen7_atoms. Normally, we would create a new generation-specific atom list, but since there's only one difference over Ivybridge so far, I chose to simply make it return without doing any work on non-Haswell systems. Fixes five piglit tests: - general/primitive-restart-DISABLE_VBO - general/primitive-restart-VBO_COMBINED_VERTEX_AND_INDEX - general/primitive-restart-VBO_INDEX_ONLY - general/primitive-restart-VBO_SEPARATE_VERTEX_AND_INDEX - general/primitive-restart-VBO_VERTEX_ONLY Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* intel: avoid undefined variable warnings in intel_screen.cPaul Berry2012-09-061-2/+3
| | | | Reviewed-by: Matt Turner <[email protected]>
* Remove useless checks for NULL before freeingMatt Turner2012-09-056-23/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch has been generated by the following Coccinelle semantic patch: // Remove useless checks for NULL before freeing // // free (NULL) is a no-op, so there is no need to avoid it @@ expression E; @@ + free (E); + E = NULL; - if (unlikely (E != NULL)) { - free(E); ( - E = NULL; | - E = 0; ) ... - } @@ expression E; type T; @@ + free ((T) E); + E = NULL; - if (unlikely (E != NULL)) { - free((T) E); ( - E = NULL; | - E = 0; ) ... - } @@ expression E; @@ + free (E); - if (unlikely (E != NULL)) { - free (E); - } @@ expression E; type T; @@ + free ((T) E); - if (unlikely (E != NULL)) { - free ((T) E); - } Reviewed-by: Brian Paul <[email protected]>
* Don't cast the return value of malloc/reallocMatt Turner2012-09-0515-23/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch has been generated by the following Coccinelle semantic patch: // Don't cast the return value of malloc/realloc. // // Casting the return value of malloc/realloc only stands to hide // errors. @@ type T; expression E1, E2; @@ - (T) ( _mesa_align_calloc(E1, E2) | _mesa_align_malloc(E1, E2) | calloc(E1, E2) | malloc(E1) | realloc(E1, E2) )
* Remove Xcalloc/Xmalloc/Xfree callsMatt Turner2012-09-051-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These calls allowed Xlib to use a custom memory allocator, but Xlib has used the standard C library functions since at least its initial import into git in 2003. It seems unlikely that it will grow a custom memory allocator. The functions now just add extra overhead. Replacing them will make future Coccinelle patches simpler. This patch has been generated by the following Coccinelle semantic patch: // Remove Xcalloc/Xmalloc/Xfree calls @@ expression E1, E2; @@ - Xcalloc (E1, E2) + calloc (E1, E2) @@ expression E; @@ - Xmalloc (E) + malloc (E) @@ expression E; @@ - Xfree (E) + free (E) @@ expression E; @@ - XFree (E) + free (E) Reviewed-by: Brian Paul <[email protected]>
* i965/blorp: Fix incorrect indentation.Paul Berry2012-09-051-2/+2
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* i965: Don't use brw->fragment_program in the old brw_wm_pass2.c.Kenneth Graunke2012-09-051-1/+1
| | | | | | | | | | | | | | According to Eric, this shouldn't matter since we don't do precompiles using the old backend. In other words, brw->fragment_program (the currently active program) should equal c->fp (the program currently being compiled). However, it's just not a good idea to access brw->fragment_program directly in compiler code. It's totally illegal in the new backend, so let's just not do it here either. Signed-off-by: Kenneth Graunke <[email protected]> Reported-by: Paul Berry <[email protected]>
* meta: Don't save and restore fog state when there is no fog stateIan Romanick2012-09-031-2/+6
| | | | | | | | | | | | | I wonder if the better solution is to have _mesa_meta_GenerateMipmap not use MESA_META_ALL for the GLSL path. Even on compatibility profiles there is no reason to save and restore fog on this path. NOTE: This is a candidate for the 9.0 branch. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Tested-by: Lu Hua <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54295
* radeon: fix free/FREE mistakeBrian Paul2012-09-011-1/+1
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* mesa: s/FREE/free/Brian Paul2012-09-0119-55/+55
| | | | | | | v2: replace instances in dri/common/ dirs Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: s/CALLOC/calloc/Brian Paul2012-09-018-17/+17
| | | | | | | v2: replace instances in dri/common/ dirs Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: s/MALLOC/malloc/Brian Paul2012-09-015-12/+12
| | | | | | | v2: replace instances in dri/common/ dirs Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Don't use brw->fragment_program in calculate_urb_setup().Kenneth Graunke2012-08-311-1/+1
| | | | | | | | | | | | | | | | | | Reading brw->fragment_program is nonsensical in compiler code: it contains the currently active program (if any), not the one currently being compiled. Attempting to access it may either lead to crashes (null pointer dereference if no program is active) or wrong results. Fixes piglit regressions since 9ef710575b914ddfc8e9a162d98ad554c1c217f7 on pre-Sandybridge hardware. The actual bug was created in commit 7b1fbc688999fd568e65211d79d7678562061594. NOTE: This is a candidate for the 9.0 and 8.0 branches. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54183 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* dri: Rework planar image interfaceJakob Bornecrantz2012-08-312-8/+153
| | | | | | | | | | | | | | | | | | | | | | As discussed with Kristian on #wayland. Pushes the decision of components into the dri driver giving it greater freedom to allow t to implement YUV samplers in hardware, and which mode to use. This interface will also allow drivers like SVGA to implement YUV surfaces without the need to sub-allocate and instead send 3 seperate buffers for each channel, currently not implemented. I have tested these changes on Gallium Svga. Scott tested them on both intel and Gallium Radeon. Kristan and Pekka tested them on intel. v2: Fix typo in dri2_from_planar. v3: Merge in intel changes. Tested-by: Scott Moreau <[email protected]> Tested-by: Pekka Paalanen <[email protected]> Tested-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* xmlconfig: use __progname when building for AndroidTapani Pälli2012-08-311-1/+1
| | | | | | | __progname symbol and strrchr are available with bionic. Signed-off-by: Tapani Pälli <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* mesa: fix-up and use _mesa_delete_renderbuffer()Brian Paul2012-08-314-4/+4
| | | | | | | | _mesa_delete_renderbuffer() should free the mutex (though that may be a no-op) and then free the renderbuffer object itself. Subclasses of gl_renderbuffer can use this function too. Reviewed-by: José Fonseca <[email protected]>
* i965/msaa: flag _NEW_MULTISAMPLE in the brw_tracked_stateAnuj Phogat2012-08-302-2/+3
| | | | | | | This is required to get the program recompiled when SampleAlphaToCoverage is enabled. Reviewed-by: Paul Berry <[email protected]>
* meta: remove call to _meta_in_progress(), fix multisample enable/disableBrian Paul2012-08-301-2/+31
| | | | | | | | | | | | | | | | | | | This partially reverts d638da23d2ec2e9c52655b1ea138249e7f8bcccb. With gallium the meta code is not always built so the call to _meta_in_progress() was unresolved. Simply special-case the GL_MULTISAMPLE case in the meta code. There might be other special cases in the future given all the differences between legacy GL, core GL, GLES, etc. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=54234 and https://bugs.freedesktop.org/show_bug.cgi?id=54239 v2 (Paul Berry <[email protected]>): keep _meta_in_progress function, since it's needed by the i965 driver, but don't call it from core mesa. Signed-off-by: Brian Paul <[email protected]>
* meta: add parenthesis to silence compiler warningsBrian Paul2012-08-301-2/+2
| | | | Reviewed-by: Paul Berry <[email protected]>
* i965/fs: Remove a dead member from live variables analysis.Eric Anholt2012-08-292-6/+0
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Initialize output_components[] by filling it with zeros.Kenneth Graunke2012-08-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Prior to commit 2f1869822, emit_fb_writes() looped from 0 to 3, writing all four components of a vec4 color output. However, that broke for smaller output types (float, vec2, or vec3). To fix that, I introduced a new variable (output_components[]) containing the size of the output type for each render target. Unfortunately, I forgot to actually initialize it in the constructor, which meant that unless a shader wrote to gl_FragColor, or the specific output for each render target, output_components would contain a garbage value, and we'd loop for a completely non-deterministic amount of time. Not actually emitting any color writes seems like the right approach. We may still need to emit a render target write (to terminate the thread), but don't have to put in any sensible values (the shader didn't write anything, after all). Fixes a regression since 2f18698220d8b27991fab550c4721590d17278e0. NOTE: This is a candidate for stable release branches. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54193 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]> Tested-by: Ian Romanick <[email protected]>
* i965: Allow creation of OpenGL 3.1 contextsIan Romanick2012-08-291-0/+19
| | | | | | | | v2: Fix API_OPENGL_CORE handling when TEXTURE_FLOAT_ENABLED is not defined. Based on review feedback from Eric Anholt. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Advertise GLSL 1.40 and TexBOs in core contextsIan Romanick2012-08-291-1/+9
| | | | Signed-off-by: Ian Romanick <[email protected]>
* intel: Clean up bits of cruft in intelCreateContextIan Romanick2012-08-291-40/+11
| | | | | | This and the previous three commits should probably be squashed together... Signed-off-by: Ian Romanick <[email protected]>
* i965: Set context flagsIan Romanick2012-08-293-2/+12
| | | | Signed-off-by: Ian Romanick <[email protected]>
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