summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers
Commit message (Expand)AuthorAgeFilesLines
* i965: use align1 access mode for instructions with execSize=1 in VSXiang, Haihao2010-12-241-0/+2
* i965: fix register region descriptionXiang, Haihao2010-12-241-1/+1
* intel: Remove unnecessary headers.Vinson Lee2010-12-232-2/+0
* i965: Remove unnecessary headers.Vinson Lee2010-12-231-2/+0
* i965: Keep around a copy of the VS constant surface dumping code.Eric Anholt2010-12-231-0/+9
* i965: Correct the dp_read message descriptor setup on g4x.Eric Anholt2010-12-233-1/+23
* i965: upload multisample state for fragment program changeZhenyu Wang2010-12-233-25/+38
* i965: Use MI_FLUSH_DW for blt ring flush on sandybridgeZhenyu Wang2010-12-232-2/+7
* i965: explicit tell header present for fb write on sandybridgeZhenyu Wang2010-12-224-8/+8
* i965: Avoid using float type for raw moves, to work around SNB issue.Eric Anholt2010-12-212-4/+8
* intel: Check for unsupported texture when finishing using as a render targetChris Wilson2010-12-211-1/+2
* nouveau: fix includes for latest libdrmBen Skeggs2010-12-211-1/+1
* r600c : inline vertex format is not updated in an app, switch to use vfetch c...richard2010-12-161-1/+1
* intel: Support glCopyTexImage() from XRGB8888 to ARGB8888.Eric Anholt2010-12-163-2/+94
* intel: Try to sanely check that formats match for CopyTexImage.Eric Anholt2010-12-161-40/+20
* intel: Drop commented intel_flush from copy_teximage.Eric Anholt2010-12-161-1/+0
* intel: Update renderbuffers before looking up CopyTexImage's read buffer.Eric Anholt2010-12-161-3/+4
* i965: Set the alternative floating point mode on gen6 VS and WM.Eric Anholt2010-12-163-0/+8
* i915: Fix INTEL_DEBUG=wm segmentation faultShuang He2010-12-161-5/+5
* i965: Add support for using the BLT ring on gen6.Eric Anholt2010-12-138-56/+72
* i965: Improve the hacks for ARB_fp scalar^scalar POW on gen6.Eric Anholt2010-12-131-36/+17
* i965: Fix gl_FragCoord.z setup on gen6.Eric Anholt2010-12-131-2/+7
* i956: Fix the old FP path fragment position setup on gen6.Eric Anholt2010-12-131-18/+20
* i965: Fix ARL to work on gen6.Eric Anholt2010-12-131-1/+17
* intel: Include stdbool so we can stop using GLboolean when we want to.Eric Anholt2010-12-132-14/+12
* r300/compiler: fix swizzle lowering with a presubtract source operandMarek Olšák2010-12-111-0/+1
* r300/compiler: fix LIT in VSMarek Olšák2010-12-111-1/+2
* i965: Put common info on converting MESA_FORMAT to BRW_FORMAT in a table.Eric Anholt2010-12-101-126/+42
* intel: Just use ChooseTextureFormat for renderbuffer format choice.Eric Anholt2010-12-101-52/+9
* intel: Add a couple of helper functions to reduce rb code duplication.Eric Anholt2010-12-105-138/+78
* intel: Add spans code for the ARB_texture_rg support.Eric Anholt2010-12-102-0/+154
* mesa/meta: fix broken assertion, rename stack depth varBrian Paul2010-12-101-5/+7
* i965: support for two-sided lighting on SandybridgeXiang, Haihao2010-12-105-6/+72
* meta: allow nested meta operationsXiang, Haihao2010-12-101-4/+10
* i965: Add support for gen6 reladdr VS constant loading.Eric Anholt2010-12-092-11/+17
* i965: Add support for gen6 constant-index constant loading.Eric Anholt2010-12-092-3/+9
* intel: Set the swizzling for depth textures using the GL_RED depth mode.Eric Anholt2010-12-092-0/+8
* intel: Use plain R8 and RG8 for COMPRESSED_RED and COMPRESSED_RG.Eric Anholt2010-12-091-0/+2
* i965: Silence uninitialized variable warning.Vinson Lee2010-12-091-0/+5
* i965: remove unused variable since brw_wm_glsl.c removal.Eric Anholt2010-12-092-2/+1
* i965: Set render_cache_read_write surface state bit on gen6 constant surfs.Eric Anholt2010-12-092-0/+9
* i965: Set up the correct texture border color state struct for Ironlake.Eric Anholt2010-12-092-5/+45
* i965: Clean up VS constant buffer location setup.Eric Anholt2010-12-091-15/+3
* i965: Fix VS constants regression pre-gen6.Eric Anholt2010-12-091-1/+1
* i965: Drop push-mode reladdr constant loading and always use constant_map.Eric Anholt2010-12-084-93/+96
* radeon: bump mip tree levels to 15Alex Deucher2010-12-091-1/+1
* i965: Drop KIL_NV from the ff/ARB_fp path since it was only used for GLSL.Eric Anholt2010-12-083-21/+0
* i965: Use the new pixel mask location for gen6 ARB_fp KIL instructions.Eric Anholt2010-12-081-2/+8
* i965: Set the render target index in gen6 fixed-function/ARB_fp path.Eric Anholt2010-12-081-0/+7
* i965: Set up the per-render-target blend state on gen6.Eric Anholt2010-12-081-46/+49
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 13:50:43 +0000