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* r600: need to export something from PSAndre Maasikas2009-10-222-2/+19
* r600: add beginnings of ARL instructionAndre Maasikas2009-10-222-3/+33
* r300: fix texture size handling with size > 2048Mathias Fröhlich2009-10-191-6/+14
* r600: Fix size calculation for 24 bit depthRobert Noland2009-10-191-2/+6
* r300: fix vertex program parameters limitsMaciej Cencora2009-10-161-7/+5
* Use the right pitch when rendering to a textureOwen Taylor2009-10-151-2/+3
* r600: FRAG_ATTRIB_WPOS and FRAG_ATTRIB_FOGC appear to be supported.Robert Noland2009-10-151-1/+12
* r600: cleanup in r600_cs_process_relocs().Robert Noland2009-10-151-15/+3
* radeon: return EINVAL for 0 length buffers.Robert Noland2009-10-151-0/+4
* r600: fix tfp1 bo sizeAndre Maasikas2009-10-151-2/+6
* r600: implement ProgramStringNotifyAndre Maasikas2009-10-151-17/+38
* r600: LIT dst.y gets value from src.xAndre Maasikas2009-10-151-0/+1
* r600: DPH adds w comp of second operand, so set first one to 1 insteadAndre Maasikas2009-10-151-1/+1
* r600: fixup KIL instruction a bitAndre Maasikas2009-10-151-18/+9
* r600: use CB_TARGET_MASK instead of CB_SHADER_MASK for setting color maskAndre Maasikas2009-10-151-3/+3
* r600: user correct alpha blend factorAndre Maasikas2009-10-151-2/+2
* r600: clear position enable bit when when wpos is not used by FPAndre Maasikas2009-10-151-0/+5
* i965: Fix the last valid address setting for the index buffer.Eric Anholt2009-10-111-1/+1
* i965: Fix the bounds emitted in the vertex buffer packets.Eric Anholt2009-10-111-2/+2
* radeon: fix scissor regressionAlex Deucher2009-10-092-8/+11
* mesa/xlib: call XQueryExtension() in glXQueryExtension()Brian Paul2009-10-071-4/+6
* mesa: don't need to free textures, VBOs, etc. in _mesa_meta_free()Brian Paul2009-10-071-28/+4
* mesa/xlib: fix glXQueryDrawable() bugs, see bug 24320Brian Paul2009-10-072-12/+28
* mesa/xlib: return 0 for errorBase, eventBase in glXQueryExtension()Brian Paul2009-10-071-3/+5
* intel: use driReadDrawable in do_copy_texsubimage()Brian Paul2009-10-051-1/+1
* intel: use driReadDrawable, not driDrawable in do_blit_readpixels()Brian Paul2009-10-051-2/+2
* intel: remove a buffer equality test in _mesa_make_current()Brian Paul2009-10-051-33/+27
* r200: remove subpixel offset from viewportFrederic Crozat2009-10-041-11/+4
* r300: Workaround problem on R500 with very large fragment programsNicolai Hähnle2009-10-032-5/+28
* xlib: use bitwise-and to test GLX_RGBA_BIT in choose_visual()Brian Paul2009-10-021-2/+2
* i965: Fix massive memory allocation for streaming texture usage.Eric Anholt2009-09-303-0/+66
* mesa/xlib: fix GLX_RENDER_TYPE queryBrian Paul2009-09-291-2/+2
* Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul2009-09-281-1/+4
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| * i915: Fix GetBufferSubData in the case of a system-memory BO.mesa_7_5_2_rc1Eric Anholt2009-09-241-1/+4
| * intel: Mark the FBO as incomplete if there's no intel_renderbuffer for it.Eric Anholt2009-09-211-0/+5
* | intel: Handle GL_RGB8 for glCopyTex(Sub)Image.Michel Dänzer2009-09-251-0/+1
* | intel: Flush the batch when we're about to subdata into a VBO.mesa_7_6_rc1Eric Anholt2009-09-242-2/+5
* | i965: Clean up some mess with the batch cache.Eric Anholt2009-09-243-18/+5
* | i965: Emit zero initialization for NV VP temporaries as required.Eric Anholt2009-09-241-0/+1
* | i965: Remove assert about NV_vp now that it somewhat works.Eric Anholt2009-09-241-2/+0
* | i965: Load NV program matrices when required.Eric Anholt2009-09-241-0/+3
* | intel: use default array/element buffers in intel_generate_mipmap()Brian Paul2009-09-241-0/+21
* | radeon: Fix scissors for r600 KMS.Pauli Nieminen2009-09-242-6/+7
* | r600: add support for CUBE textures, also TXPAndre Maasikas2009-09-242-47/+263
* | r600: fix typo in the last commitAlex Deucher2009-09-241-5/+5
* | r600: various cleanupsAlex Deucher2009-09-243-45/+24
* | r600: fix some issues with LIT instructionAndre Maasikas2009-09-241-33/+36
* | r600: fix point sizesAlex Deucher2009-09-241-4/+4
* | r600: fix polygon offsetAlex Deucher2009-09-241-3/+8
* | radeon: don't build non-r600 span code on r600Alex Deucher2009-09-241-1/+5