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* i965: Port gen4+ state emitting code to genxml.Rafael Antognolli2017-05-035-230/+174
* i965: Port gen6+ 3DSTATE_CC_STATE_POINTERS state to genxml.Rafael Antognolli2017-05-034-95/+50
* i965: Port gen6+ multisample state emitting code to genxml.Rafael Antognolli2017-05-035-136/+96
* i965: Port gen4+ emit vertices code to genxml.Rafael Antognolli2017-05-034-792/+556
* i965: Port push constant code to genxml.Rafael Antognolli2017-05-039-385/+226
* i965: Port gen6+ 3DSTATE_SCISSOR_STATE_POINTERS to use genxml.Rafael Antognolli2017-05-034-116/+87
* i965: Port gen7+ 3DSTATE_TE to genxml.Rafael Antognolli2017-05-034-71/+39
* i965: Port gen6+ blend state code to genxml.Rafael Antognolli2017-05-035-522/+312
* i965: Port gen6+ state emitting code to genxml.Rafael Antognolli2017-05-0313-1180/+471
* i965: Port gen6+ 3DSTATE_VS to genxml.Rafael Antognolli2017-05-036-304/+124
* i965: Port gen8+ 3DSTATE_PS_EXTRA to genxml.Rafael Antognolli2017-05-034-150/+88
* i965: Port gen6+ 3DSTATE_WM to genxml.Rafael Antognolli2017-05-036-435/+185
* i965: Port gen7+ 3DSTATE_PS to genxml.Rafael Antognolli2017-05-034-255/+134
* i965: Port gen7+ 3DSTATE_SOL to genxml.Rafael Antognolli2017-05-035-412/+338
* i965: Remove calculate_attr_overrides.Rafael Antognolli2017-05-033-274/+0
* i965: Port Gen7+ 3DSTATE_SBE state to genxml.Rafael Antognolli2017-05-035-274/+116
* i965: Port gen6+ 3DSTATE_SF to genxml.Rafael Antognolli2017-05-035-424/+417
* i965: Add brw_get_line_width_float.Rafael Antognolli2017-05-031-11/+14
* i965: Port Gen8+ 3DSTATE_RASTER state to genxml.Rafael Antognolli2017-05-033-127/+123
* i965: Port Gen6+ 3DSTATE_CLIP state to genxml.Rafael Antognolli2017-05-033-143/+135
* i965: Port Gen6+ DEPTH_STENCIL state to genxml.Kenneth Graunke2017-05-035-238/+101
* i965: Get real per-gen atom listsKenneth Graunke2017-05-033-368/+370
* i965: Add genxml related plumbing in a new genX_state_upload.c file.Kenneth Graunke2017-05-033-5/+140
* i965: Drop "Destination Element Offset" from Ironlake SGVs.Kenneth Graunke2017-05-031-2/+4
* i965: Move MOCS macros to brw_context.h.Rafael Antognolli2017-05-032-42/+41
* i965: Solve Android native fence fd double closeRandy Xu2017-05-011-1/+1
* i965: Don't allocate uniform space for samplersTimothy Arceri2017-05-011-1/+1
* i965: Drop BRW_NEW_CONTEXT from 3DSTATE_DS/GS on Gen7-7.5.Kenneth Graunke2017-04-282-2/+0
* i965: Drop _NEW_TRANSFORM from 3DSTATE_DS/GS on Gen7-7.5.Kenneth Graunke2017-04-282-2/+2
* i965: Set point rasterization rule to UPPER_RIGHT on Gen6-7.5.Kenneth Graunke2017-04-282-0/+3
* i965: Always set AALINEDISTANCE_TRUE on Sandybridge.Kenneth Graunke2017-04-281-2/+1
* i965: Use true AA line distance on G45/Ironlake.Kenneth Graunke2017-04-281-1/+1
* i965: Remove unused variable 'options'Matt Turner2017-04-251-2/+0
* i965: remove now unused GLSL IR optimisationsTimothy Arceri2017-04-244-888/+0
* i965: remove GLSL IR optimisation loopTimothy Arceri2017-04-241-16/+0
* mesa: replace _mesa_index_buffer::type with index_sizeMarek Olšák2017-04-228-34/+33
* mesa: rename _mesa_add_renderbuffer* functionsTimothy Arceri2017-04-187-41/+37
* i965/drm: Delete NULL check in brw_bo_unmap().Kenneth Graunke2017-04-161-3/+0
* i965/drm: Remove dead return in brw_bo_busy()Kenneth Graunke2017-04-161-3/+1
* i965: enable OpenGL 4.2 in IvybridgeJuan A. Suarez Romero2017-04-142-2/+2
* i965: enable ARB_shader_precision in gen7+Samuel Iglesias Gonsálvez2017-04-141-1/+1
* i965: enable ARB_vertex_attrib_64bit for gen7+Juan A. Suarez Romero2017-04-141-1/+1
* i965: enable OpenGL 4.0 to Ivybridge/BaytrailSamuel Iglesias Gonsálvez2017-04-142-5/+6
* i965: enable ARB_gpu_shader_fp64 for Ivybridge/BaytrailSamuel Iglesias Gonsálvez2017-04-141-1/+1
* i965: add missing ir_unop_*/ir_binop_* in visit_leave()Samuel Pitoiset2017-04-131-0/+3
* radeon: fix duplicate 'const' specifierSamuel Pitoiset2017-04-132-2/+2
* i965/drm: Use bools for a few flags.Kenneth Graunke2017-04-111-2/+2
* i965/drm: Make brw_bo_alloc_tiled flags parameter 32-bit.Kenneth Graunke2017-04-113-4/+4
* i965/drm: Make BO size a uint64_t rather than unsigned long.Kenneth Graunke2017-04-112-11/+11
* i965/drm: Make alignment parameter a uint64_t.Kenneth Graunke2017-04-112-4/+4
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