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path: root/src/mesa/drivers
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* i965: Rewrite ir_tex to ir_txl with lod 0 for vertex shadersKristian Høgsberg2015-04-161-0/+9
* i965/skl: Add the header for constant loads outside of the generatorNeil Roberts2015-04-166-35/+63
* i965/vec4: Add a helper function to emit VS_OPCODE_PULL_CONSTANT_LOADNeil Roberts2015-04-163-77/+75
* i965/fs: Combine tex/fb_write operations (opt)Ben Widawsky2015-04-143-0/+103
* i965/fs: Only emit FS_OPCODE_PLACEHOLDER_HALT if there are discardsBen Widawsky2015-04-141-1/+4
* i965/fs: Create a has_side_effects for fs_instBen Widawsky2015-04-142-0/+7
* i965: replace __FUNCTION__ with __func__Marius Predut2015-04-1424-72/+72
* i915: replace __FUNCTION__ with __func__Marius Predut2015-04-1424-107/+107
* swrast: replace __FUNCTION__ with __func__Marius Predut2015-04-142-3/+3
* i965/fs: Correct mistake in determining whether a MUL is negated.Matt Turner2015-04-141-1/+1
* i965/skl: Use an exec size of 8 to initialise the message headerNeil Roberts2015-04-142-2/+2
* i965/fs: Always invert predicate of SEL with swapped argumentsIan Romanick2015-04-141-5/+5
* i965: Implement proper workaround for Gen4 GPU CONSTANT_BUFFER hangs.Kenneth Graunke2015-04-141-13/+26
* i965: Fix INTEL_DEBUG=shader_time for SIMD8 VS.Kenneth Graunke2015-04-141-0/+3
* i965: Flush batchbuffer containing the query on glQueryCounter.Mathias Froehlich2015-04-131-0/+2
* i965: Don't bother freeing NULL.Matt Turner2015-04-131-4/+2
* i965: Lift some restrictions on dma_buf EGLImagesChad Versace2015-04-133-22/+7
* i965: Disable aux buffers for EGLImage-backed miptreesChad Versace2015-04-132-5/+19
* i965: Change intel_miptree_create_for_bo() signatureChad Versace2015-04-136-11/+21
* i965: Add field intel_mipmap_tree::disable_aux_buffersChad Versace2015-04-132-2/+29
* i965: Refactor brw_is_hiz_depth_format()Chad Versace2015-04-135-25/+30
* i965: Declare intel_miptree_create_layout() as staticChad Versace2015-04-132-14/+1
* i965: Declare intel_miptree_alloc_mcs() as staticChad Versace2015-04-132-6/+6
* i965/nir: Make INTEL_DEBUG=ann work with NIR.Kenneth Graunke2015-04-112-1/+8
* i965: Create NIR during LinkShader() and ProgramStringNotify().Kenneth Graunke2015-04-117-176/+250
* nir: Store num_direct_uniforms in the nir_shader.Kenneth Graunke2015-04-111-2/+3
* i965: Move lower_output_reads to brw_link_shader().Kenneth Graunke2015-04-112-1/+3
* i965: Remove useless null check.Matt Turner2015-04-111-4/+0
* i965/fs/nir: Mark fallthrough.Matt Turner2015-04-111-0/+2
* i965: Remove useless reg_offset >= 0 tests.Matt Turner2015-04-112-2/+0
* nir: split out lower_sub from lower_negateRob Clark2015-04-111-0/+1
* i965: Use NIR by default for fragment shadersJason Ekstrand2015-04-101-1/+1
* i965: Don't set NirOptions for stages that will use the vec4 backend.cros-mesa-10.6-vanillachadv/cros-mesa-10.6-vanillachadv/cros-gerrit-262788-baseKenneth Graunke2015-04-101-9/+6
* i965/disasm: Print the type after the swizzle also for 3src src operandsVille Syrjälä2015-04-101-3/+3
* i965: Move brw_link_shader's GLSL IR transformations into a helper.Kenneth Graunke2015-04-101-93/+99
* i965: Change brw_shader to gl_shader in brw_link_shader().Kenneth Graunke2015-04-101-32/+31
* nir: Make nir_lower_samplers take a gl_shader_stage, not a gl_program *.Kenneth Graunke2015-04-101-1/+1
* i965/skl: Fix the order of the arguments for the LD sampler messageNeil Roberts2015-04-081-2/+13
* i965: Fix depth field setting in surface state for raw buffer on Gen7/8Zhenyu Wang2015-04-082-4/+10
* i965: Add the ability to render to I8/L8 and I16/L16 UNORM formats.Kenneth Graunke2015-04-071-0/+8
* i965: Use SET_FIELD in 3DSTATE_STREAMOUT packets.Kenneth Graunke2015-04-072-16/+16
* i965: Do not render primitives in non-zero streams then TF is disabledIago Toral Quiroga2015-04-061-0/+13
* i965: Add forgotten multi-stream code to Gen8 SOL state.Kenneth Graunke2015-04-061-0/+9
* i965: Fix instanced geometry shaders on Gen8+.Kenneth Graunke2015-04-061-0/+2
* i965: Free dead GLSL IR one last time.Kenneth Graunke2015-04-061-0/+12
* i965: Implement SIMD16 texturing on Gen4.Kenneth Graunke2015-04-063-10/+90
* i965: Use SIMD16 instead of SIMD8 on Gen4 when possible.Kenneth Graunke2015-04-062-3/+4
* i965: Respect the no_8 flag on Gen4-5.Kenneth Graunke2015-04-061-21/+34
* i965/fp: Set coord_components correctly for cube textures.Kenneth Graunke2015-04-061-1/+1
* nir: Remove fsin_reduced/fcos_reduced.Matt Turner2015-04-061-2/+0
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