summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers
Commit message (Expand)AuthorAgeFilesLines
* i965: Add dumping for gen6 WM constants too.Eric Anholt2011-08-053-1/+22
* i965/fs: Don't upload unused uniform components.Eric Anholt2011-08-052-4/+95
* i965/fs: Don't allocate the old backend's compile structs for our compile.Eric Anholt2011-08-051-4/+7
* Merge branch 'glsl-to-tgsi'Bryan Cain2011-08-047-30/+30
|\
| * r200, r600c, i965: fix buildBryan Cain2011-08-017-30/+30
* | radeon: Remove some remaining set-but-unused variables.Eric Anholt2011-08-024-14/+0
* | radeon: Remove set-but-unused variables in radeon_lock.cEric Anholt2011-08-021-10/+0
* | radeon: Remove set-but-unused variables in radeonSetTexBuffer2() variants.Eric Anholt2011-08-025-29/+0
* | radeon: Remove set-but-unused log2depth variable.Eric Anholt2011-08-021-2/+1
* | radeon: Remove set-but-unused color_mask variable.Eric Anholt2011-08-022-6/+0
* | intel: Fix unused variable warning.Eric Anholt2011-08-021-1/+0
* | i915: Only emit program errors when INTEL_DEBUG=wm or INTEL_DEBUG=fallbacksIan Romanick2011-08-021-6/+8
* | i915: Fail without crashing if a Mesa IR program uses too many registersIan Romanick2011-08-021-2/+13
* | i965/gen5+: Fix incorrect miptree layout for non-power-of-two cubemaps.Kenneth Graunke2011-08-011-1/+1
* | i965/fs: Allow register coalescing where the source is a uniform.Eric Anholt2011-07-291-10/+14
* | i965/fs: Optimize a * 1.0 -> a.Eric Anholt2011-07-292-0/+44
* | i965/fs: If we see a RCP of a constant, try to constant fold it.Eric Anholt2011-07-291-0/+14
* | i965/fs: Port texture projection avoidance optimization from the old backend.Eric Anholt2011-07-291-3/+15
* | Revert "i965: Don't compute brw->wm.input_size_masks when it's unused."Eric Anholt2011-07-291-11/+1
* | i965/fs: Stop using the exec_list iterator.Eric Anholt2011-07-296-71/+67
* | i965/fs: Respect ARB_color_buffer_float clamping.Eric Anholt2011-07-281-6/+15
* | mesa: fix format selection for meta CopyTexSubImage()Brian Paul2011-07-281-0/+10
* | i965: Remove the now unused intel_renderbuffer::draw_offset field.Kenneth Graunke2011-07-282-2/+0
* | i965: Check actual tile offsets in Gen4 miptree workaround.Kenneth Graunke2011-07-281-2/+17
* | i965/gen4: Fix message parameter loading for 1D TXD sampling.Kenneth Graunke2011-07-281-2/+4
* | i965/fs: Fix MRT drawing since the m0->m2 move for shader debug.Eric Anholt2011-07-251-1/+2
* | r300/compiler: simplify code in peephole_add_presub_addTobias Droste2011-07-251-17/+18
* | i965: Fix many of the trivial WebGL demos that broke due to IB optimization.Eric Anholt2011-07-251-0/+1
* | i965: Use 3D clears on gen6+ to avoid inter-ring synchronization.Eric Anholt2011-07-251-2/+2
* | meta: Also save/restore clip planes for GLSL.Eric Anholt2011-07-251-1/+13
* | i965: Emit texture cache flushes on gen6 along with render cache flushes.Eric Anholt2011-07-251-0/+1
* | i965: vs optimization fix: Check val.{negate,abs} in accumulator_contains()Paul Berry2011-07-251-0/+3
* | i965/gen7: Fix shadow sampling in the old brw_wm_emit backend.Kenneth Graunke2011-07-251-4/+11
* | i965/fs: Clear result before visiting shadow comparitor and LOD info.Kenneth Graunke2011-07-251-0/+10
* | i965: When emitting a src/dst read of an output, keep the swizzle and negIan Romanick2011-07-231-3/+16
* | i965: When emitting a src/dst write of an output, keep the write maskIan Romanick2011-07-231-1/+5
* | Merge branch 'remove-copyteximage-hook'Brian Paul2011-07-2111-287/+0
|\ \
| * | meta: remove _mesa_meta_CopyTexImage1D/2D()Brian Paul2011-07-193-125/+0
| * | radeon: remove radeonCopyTexImage2D()Brian Paul2011-07-197-65/+0
| * | intel: remove intelCopyTexImage1D/2D()Brian Paul2011-07-191-97/+0
* | | i965: Apply a homebrew workaround for GPU hang in OGLC api-texcoord.Eric Anholt2011-07-201-0/+26
* | | i965: Enable the PIPE_CONTROL workaround workaround out of paranoia.Eric Anholt2011-07-202-3/+29
* | | i965: Avoid kernel BUG_ON if we happen to wait on the pipe_control w/a BO.Eric Anholt2011-07-201-1/+1
* | | intel: Use the GLSL-based meta clear when available.Eric Anholt2011-07-201-1/+4
* | | meta: Add a GLSL-based _mesa_meta_Clear() variant.Eric Anholt2011-07-202-1/+162
|/ /
* | intel: Fix stencil buffer to be W tiledChad Versace2011-07-195-31/+93
* | i965: Fix regression in 29a911c50e4443dfebef0a2e32c39b64992fa3cc.Eric Anholt2011-07-191-1/+1
* | i965: Rename CMD_VF_STATISTICS_(965|GM45) to include "3DSTATE".Kenneth Graunke2011-07-182-4/+4
* | i965: Rename CMD_VERTEX_(BUFFER|ELEMENT) to 3DSTATE_VERTEX_...S.Kenneth Graunke2011-07-182-5/+5
* | i965: Rename 3DSTATE_DRAWRECT_INFO_I965 to 3DSTATE_DRAWING_RECTANGLE.Kenneth Graunke2011-07-182-2/+1