| Commit message (Collapse) | Author | Age | Files | Lines |
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This makes reading the code easier when matching up to the specs,
which also use this format.
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The SIMD16 message no longer has the goofy interleaved format that
made Compr4 compression necessary before.
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If we hit the linear blit path, we'd come up with a pitch of 0, then
divide by zero.
Fixes vbo-subdata-zero, made for bug #28931 (warsow).
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format ‘%d’ expects type ‘int’, but argument 2 has type ‘long int’
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Otherwise, we might end up with the if stack pointing at the wrong
place. Fixes GPU hang with glsl-vs-if-loop.
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Fixes glsl-vs-if-nested (70.0 is not <= 70.000648 thanks to the
swizzle bits getting set). Some safety checks are added to make sure
this doesn't happen again as we increase the usage of immediate values
in program generation.
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Hooray, we can valgrind again without adding suppressions. This also
adds an interface for use by an implementation of
glReleaseShaderCompiler().
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We'll need to use the HALT instruction to do this right, like returns
from other functions.
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Fixes glsl-fs-sign and many of the tests of trig builtins.
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Fixes glsl-unused-varying and many others, since we produce an output
reg read any time gl_FragColor is written inside an if statement.
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Fixes glsl-fs-dot-vec2.
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Now that we have glsl2 with if flattening in place, most shaders will
just work. Remaining failing shaders will mostly be due to loop
unrolling (in progress), some possible if flattening failures in
inlining functions (planning on fixing), and the register/instruction
count limits.
While the GLSL and GLSL-ES specs say that shaders shouldn't fail to
compile/link due to register/instruction limits, in practice we're not
the first vendor to expose GLSL on hardware with these limitations.
The benefit to application developers of providing a better language
for GPU programming is greater than the pain of having to handle
instruction limits (which they had to for ARB_fp on this hardware
anyway)
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with glsl2, reads from outputs are legal
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Fixes glsl-vs-dot-vec2.
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This saves an extra message reg move in the program, though I'm not
clear on whether it will have any performance impact other than cache
footprint. It will also fix those math calls on Sandybridge, where
the brw_eu_emit.c brw_math() support relies on the implied move being
used.
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Conflicts:
src/mesa/program/prog_optimize.c
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Mixing stderr (_mesa_print_program, _mesa_print_instruction,
_mesa_print_alu) with stdout means that when writing both to a file,
there isn't a consistent ordering between the two.
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This pulls in multiple i965 driver fixes which will help ensure better
testing coverage during development, and also gets past the conflicts
of the src/mesa/shader -> src/mesa/program move.
Conflicts:
src/mesa/Makefile
src/mesa/main/shaderapi.c
src/mesa/main/shaderobj.h
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The original glsl compiler would generate a.x * b.x + a.y * b.y, which
we would do mul+mul+add for instead of this mul+mac.
Fixes glsl-fs-dot-vec2.
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The old compiler didn't use SSG, and instead emitted SGT/SGT/SUB. We
can do a little better for SSG than we do for the SGT series.
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- set VGT_MAX_VTX_INDX to a larger value
- emit PA_SC_AA_CONFIG. The command checker in 2.6.36+
requires this reg.
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'struct dd_function_table' only conditionally contains
the function pointer NewFramebuffer and friends based on
FEATURE_EXT_framebuffer_* defines. (See src/mesa/main/dd.h)
Fixes the build when the features are disabled and the vfuncs
don't exist.
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'struct dd_function_table' only conditionally contains
the function pointer NewFramebuffer and friends based on
FEATURE_EXT_framebuffer_* defines. (See src/mesa/main/dd.h)
Fixes the build when the features are disabled and the vfuncs
don't exist.
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use VTX_BASE_VTX_LOC for offset, last time using INDEX_OFFSET was
probably a wrong register for this
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Single loops work, but nested loops do not.
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