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* i965: Fix gl_VertexID when there are no other vertex inputs.Paul Berry2012-12-181-3/+3
* mesa: Make a function is_transform_feedback_active_and_unpaused.Paul Berry2012-12-185-10/+8
* mesa: refactor _mesa_compute_max_transform_feedback_vertices from i965.Paul Berry2012-12-181-12/+4
* mesa: Change args to vbo_count_tessellated_primitives.Paul Berry2012-12-181-1/+3
* wmesa: include version.h to silence warningBrian Paul2012-12-171-0/+1
* xlib: include headers to fix errors/warningsBrian Paul2012-12-171-0/+2
* mesa osmesa/x11: fix build error introduced in 4bea4cb9Jordan Justen2012-12-172-8/+8
* drivers: compute version and then initialize exec tableJordan Justen2012-12-1610-0/+73
* i965: Move BRW_MAX_GRF and similar defines to brw_reg.h.Kenneth Graunke2012-12-152-18/+17
* i965: Split struct brw_reg out from brw_eu.h into its own header.Kenneth Graunke2012-12-152-709/+778
* i965: Add missing autoconf bits so test_vec4_register_coalesce will buildIan Romanick2012-12-141-0/+3
* i965: Generalize VS compute-to-MRF for compute-to-another-GRF, too.Eric Anholt2012-12-143-61/+128
* i965/vs: Extend opt_compute_to_mrf to handle limited "reswizzling"Eric Anholt2012-12-143-9/+113
* i965/vs: Add a unit test for opt_compute_to_mrf().Eric Anholt2012-12-143-2/+133
* i965/fs: Drop an unnecessary _safe on a list walk.Eric Anholt2012-12-141-1/+1
* i965/fs: Add a note explaining a detail of register_coalesce_2().Eric Anholt2012-12-141-0/+21
* i965: Also consider HALTs a potential block end.Eric Anholt2012-12-141-0/+1
* i965: Jump to the end of the next outer conditional block on ENDIFs.Kenneth Graunke2012-12-141-0/+7
* i965: expose ARB_texture_cube_map_arrayChris Forbes2012-12-141-0/+1
* i965/fs: Fix setup for textureGrad(samplerCubeArray, coord, dPdx, dPdy)Eric Anholt2012-12-141-7/+12
* i965/fs: Move the failure for gen7 16-wide intdiv to emit_math().Eric Anholt2012-12-142-7/+4
* i965: fs: Add fixup for textureSize on Gen6/7Chris Forbes2012-12-141-0/+11
* i965: fs: fix gen6+ math operands in one placeChris Forbes2012-12-142-28/+33
* i965: vs: Add fixup for textureSize with cube array samplersChris Forbes2012-12-141-0/+13
* i965/vs: Fix gen6+ math operand quirks in one placeChris Forbes2012-12-142-34/+28
* i965: Add various plumbing for cubemap arraysChris Forbes2012-12-145-3/+11
* i965/fs: Add empirically-determined instruction latencies for gen7.Eric Anholt2012-12-141-3/+179
* i965/fs: Fix the clock increment in scheduling.Eric Anholt2012-12-141-3/+15
* i965/fs: Move the old gen4 bspec-based scheduling info to a helper func.Eric Anholt2012-12-141-33/+41
* i965/fs: Set up gen7 UBO loads as sends from GRFs.Eric Anholt2012-12-145-7/+114
* i965/fs: Before reg alloc, schedule instructions to reduce live ranges.Eric Anholt2012-12-141-6/+41
* i965/fs: Add some optional debug printfs to scheduling.Eric Anholt2012-12-141-0/+21
* i965/fs: Schedule instructions both before and after register allocation.Eric Anholt2012-12-143-18/+78
* i965: Make sure that the shader_time report at context destroy happens.Eric Anholt2012-12-141-0/+3
* i965: Print a total time for the different shader stages.Eric Anholt2012-12-141-10/+38
* i965: Scale shader_time to compensate for resets.Eric Anholt2012-12-144-9/+83
* i965: Adjust the split between shader_time_end() and shader_time_write().Eric Anholt2012-12-144-51/+55
* i965: Fix disassembly of jump targets on Gen7.Kenneth Graunke2012-12-121-4/+9
* i965: Make try_rewrite_rhs_to_dst compare VGRF size to regs written.Kenneth Graunke2012-12-121-1/+1
* mesa: don't advertise ARB_texture_buffer_object in legacy contextsMarek Olšák2012-12-121-4/+1
* mesa: disallow creation of GL 3.1 compatibility contextsMarek Olšák2012-12-121-5/+1
* i965/fs: Improve performance of shaders that start out with a discard.Eric Anholt2012-12-116-7/+148
* i965/fs: Rewrite discards to use a flag subreg to track discarded pixels.Eric Anholt2012-12-118-73/+46
* i965/fs: Add an instruction flag for choosing the flag subregister.Eric Anholt2012-12-116-13/+42
* i965: Let brw_flag_reg() choose the flag reg and subreg.Eric Anholt2012-12-114-7/+7
* i965: Print the flag reg updated by conditional modifiers.Eric Anholt2012-12-111-1/+15
* i965: Add the new flag_reg_nr instruction field from IVB.Eric Anholt2012-12-112-5/+9
* i965: Correct the name and usage of the flag subregister number field.Eric Anholt2012-12-114-15/+15
* i965: Remove bogus flag_reg_nr field from bits3.Eric Anholt2012-12-111-4/+2
* r200: fix broken tcl lightingsmoki2012-12-101-10/+10
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