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* i965/gen9: Support fast clears for 32b floatBen Widawsky2015-11-202-10/+6
* Revert "i965/gen9: Enable rep clears on gen9"Ben Widawsky2015-11-201-5/+0
* Revert "i965/gen9: Disable MCS for 1x color surfaces"Ben Widawsky2015-11-201-8/+0
* i965/meta/gen9: Individually fast clear color attachmentsBen Widawsky2015-11-201-13/+65
* i965/skl: skip fast clears for certain surface formatsBen Widawsky2015-11-202-27/+33
* i965: Add lossless compression to surface format tableBen Widawsky2015-11-203-252/+282
* i965/skl: Add fast color clear infrastructureBen Widawsky2015-11-204-20/+81
* xmlconfig: Add support for DragonFlyFrançois Tigeot2015-11-201-0/+3
* i965: Enable EXT_shader_samples_identicalIan Romanick2015-11-195-2/+34
* i965/vec4: Handle nir_tex_src_ms_index more like the scalarIan Romanick2015-11-191-8/+10
* nir: Add nir_texop_samples_identical opcodeIan Romanick2015-11-192-0/+2
* nir: add nir_var_all enumRob Clark2015-11-191-1/+1
* i965: Drop IMM fs_reg/src_reg -> brw_reg conversions.Matt Turner2015-11-192-36/+2
* i965/vec4: Replace src_reg(imm) constructors with brw_imm_*().Matt Turner2015-11-1912-239/+195
* i965/fs: Use brw_imm_uw().Matt Turner2015-11-192-8/+3
* i965/fs: Replace fs_reg(imm) constructors with brw_imm_*().Matt Turner2015-11-199-217/+167
* i965: Make brw_imm_vf4() take 8-bit restricted floats.Matt Turner2015-11-192-32/+11
* i965: Allow indirect GS input indexing in the scalar backend.Kenneth Graunke2015-11-184-46/+107
* i965/nir: Add hooks for testing nir_shader_cloneJason Ekstrand2015-11-181-9/+26
* i965/nir: Validate that NIR passes call nir_metadata_preserve().Kenneth Graunke2015-11-181-3/+7
* i965/nir: Add OPT() and OPT_V() macros for invoking NIR passes.Kenneth Graunke2015-11-181-72/+59
* i965: Add enums for 3DSTATE_TE field values.Kenneth Graunke2015-11-181-0/+28
* meta/generate_mipmap: Don't leak the framebuffer objectIan Romanick2015-11-181-0/+5
* i965: Prevent fast clears for MSRTs on SKLNeil Roberts2015-11-181-0/+7
* i965: Fix PIPE_CONTOL typo.Kenneth Graunke2015-11-171-1/+1
* i965: Add assertion for src_stencil payload sizeBen Widawsky2015-11-171-0/+6
* i965: Implement ARB_pipeline_statistics_query tessellation counters.Kenneth Graunke2015-11-171-8/+8
* i965: Add INTEL_DEBUG=shader_time support for tessellation shaders.Kenneth Graunke2015-11-172-0/+14
* i965: Add INTEL_DEBUG=tcs,tes and hs,ds flags for tessellation shaders.Kenneth Graunke2015-11-172-2/+8
* i965: Add more MAX_*_URB_ENTRY_SIZE_BYTES #defines.Kenneth Graunke2015-11-171-0/+6
* i965: Add missing stdio.h include to brw_compiler.h.Kenneth Graunke2015-11-171-0/+1
* i965: Return the correct value type from brw_compile_gs()Eduardo Lima Mitev2015-11-171-1/+1
* i965: Set MaxCombinedUniformBlocks properly.Kenneth Graunke2015-11-161-0/+1
* i965: Clean up context constant initialization code.Kenneth Graunke2015-11-161-80/+54
* i965: Convert scalar_* flags to a scalar_stage array.Kenneth Graunke2015-11-1610-39/+27
* r200: fix bgrx8/xrgb8 blitsRoland Scheidegger2015-11-171-0/+4
* radeon: fix bgrx8/xrgb8 blitsRoland Scheidegger2015-11-171-0/+2
* meta/generate_mipmap: Only modify the draw framebuffer binding in fallback_re...Ian Romanick2015-11-161-4/+4
* i965: Introduce a MOV_INDIRECT opcode.Kenneth Graunke2015-11-146-0/+80
* i965: Add a SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT opcode.Kenneth Graunke2015-11-134-5/+10
* i965: Print input/output VUE maps on INTEL_DEBUG=vs, gs.Kenneth Graunke2015-11-134-1/+40
* i965: Make convert_attr_sources_to_hw_regs handle stride == 0.Kenneth Graunke2015-11-131-1/+2
* i965: Silence unused parameter warnings in get_buffer_rectIan Romanick2015-11-131-4/+3
* meta/generate_mipmap: Don't leak the sampler objectIan Romanick2015-11-131-0/+2
* i965: Remove unneeded #includes.Matt Turner2015-11-131-4/+0
* i965: Silence warning.Matt Turner2015-11-131-2/+2
* i965: Don't write beyond allocated memory.Juha-Pekka Heikkila2015-11-131-1/+1
* i965: Use BRW_MRF_COMPR4 macro in more places.Matt Turner2015-11-134-6/+6
* i965: Combine register file field.Matt Turner2015-11-137-34/+27
* i965: Replace HW_REG with ARF/FIXED_GRF.Matt Turner2015-11-1313-211/+157
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